Metal-Containing Dielectric Capping Barrier for Interconnects
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Solution Overview
Problem
Copper interconnects in semiconductor devices face issues with copper diffusion into silicon-based materials, leading to degradation of dielectric layers and device failure, and existing solutions like thicker capping layers impair the effective dielectric constant, while reducing dimensions for smaller geometries is challenging without compromising diffusion-blocking properties.
Innovation Solution
A method involving the formation of a semiconductor interconnect structure with a low-k bulk dielectric layer, a conformal liner layer, a copper layer, and a metal-containing dielectric capping layer, such as metal oxides, nitrides, or oxynitrides, which effectively blocks copper diffusion and maintains adhesion strength at reduced thicknesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the capping layer is made thicker to prevent electromigration, then the diffusion-blocking properties are improved, but the effective dielectric constant of the interconnect level is strongly impaired
Solution Approach 1:
The patent employs a composite capping layer structure consisting of a first dielectric material layer (such as silicon nitride or silicon oxide) and a second dielectric material layer (such as low-k dielectric material) with different dielectric constants. This composite structure allows the first layer to provide diffusion-blocking properties while the second layer maintains a lower overall dielectric constant, thus resolving the contradiction between diffusion blocking and effective dielectric constant.
Solution Approach 2:
The patent applies different dielectric materials with specific properties to different regions of the capping layer. The first dielectric material layer is positioned adjacent to the copper interconnect where diffusion blocking is most critical, while the second dielectric material layer extends over other areas where lower dielectric constant is prioritized. This local differentiation allows simultaneous optimization of both diffusion blocking and effective dielectric constant.
2Length of moving object
If the dimensions of interconnect structures and capping layers are reduced for smaller geometries, then the capacity and cost efficiency are improved, but the diffusion-blocking properties become difficult to ensure
Solution Approach 1:
The composite capping layer structure enables effective diffusion blocking even at reduced dimensions by combining materials with complementary properties. The first dielectric material layer provides robust diffusion blocking at the critical interface with copper, while the overall structure can be scaled down in thickness while maintaining sufficient barrier performance.
Solution Approach 2:
The conformal liner layer is deposited on the copper interconnect surface before forming the dielectric capping layers. This preliminary action creates a diffusion barrier at the copper-dielectric interface, enhancing the overall diffusion-blocking capability of the capping structure and enabling reliable performance at smaller dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the robustness of interconnects by reducing electromigration through the capping layer, enabling reliable performance at smaller critical dimensions without compromising the dielectric constant.
Implementation Method 1
Copper interconnects have become the industry standard since 180 nm CMOS technology nodes because of its high interconnect conductivity and electromigration resistance. However, comparing to other transition metals, copper has much higher diffusivity in silicon-based materials. The rapid diffusion of copper atoms into the surrounding silicon dioxide or other low-k dielectric materials during device operation creates shortcut paths that degrade the dielectric layer and result in device failure.
Implementation Method 2
forming a liner layer on the low-k bulk dielectric layer, the liner layer deposited conformally to the trench
Implementation Method 3
The properties of the capping layer are especially critical since a common failure mechanism for electromigration is through the capping layer. This approach enhances the robustness of interconnects by reducing electromigration through the capping layer
Data Source
AI summary
A method is provided for forming an interconnect structure for use in semiconductor devices. The method starts with forming a low-k bulk dielectric layer on a substrate and then forming a trench in the low-k bulk dielectric layer. A liner layer is formed on the low-k bulk dielectric layer being deposited conformally to the trench. A copper layer is formed on the liner layer filling the trench. Portions of the copper layer and liner layer are removed to form an upper surface of the low-k bulk dielectric layer, the liner layer, and the copper layer. A metal containing dielectric layer is formed on the upper surface of the low-k bulk dielectric layer, the liner layer, and the copper layer.