Metal-Containing Etching Stop Layer for FinFET Source/Drain Patterning
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Solution Overview
Problem
Conventional FinFET devices suffer from epi-selectivity loss in the formation of source/drain regions due to the lack of optimized methods for defining these regions during fabrication.
Innovation Solution
A metal-containing layer is used as an etching stop layer and to pattern the source/drain regions, facilitating their definition through selective etching processes, allowing for separate epitaxial growth of source/drain regions for P-type and N-type FinFETs without simultaneous growth, thus avoiding epi-selectivity loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to define source/drain regions in FinFET fabrication, then the fabrication process is simpler, but epi-selectivity loss occurs in the formation of source/drain regions
Solution Approach 1:
The source and drain regions are defined and formed separately using distinct etching and epitaxial growth processes. A metal-containing layer is used to selectively define the source region first, then removed and re-deposited to define the drain region, enabling independent optimization of each region's epitaxial growth without cross-contamination or selectivity loss
Solution Approach 2:
A metal-containing layer is deposited in advance to serve as a placeholder and etching stop layer before the actual source/drain epitaxial growth. This preliminary layer enables precise definition of the source region boundaries, and after the source is formed, the same approach is used to define the drain region, ensuring high epi-selectivity throughout the process
2Reliability
If source and drain regions are formed simultaneously, then the fabrication process is faster, but epi-selectivity loss occurs
Solution Approach 1:
The simultaneous formation of source and drain regions is divided into sequential steps: first the source region is defined using a metal-containing layer and etched, then the metal layer is removed and re-deposited to define the drain region. This segmentation prevents epi-selectivity loss by ensuring that each region is formed under controlled, separate conditions
Solution Approach 2:
The metal-containing layer serves as an intermediary element that enables precise definition of both source and drain regions. It acts as a temporary structure that guides the etching process and is later removed, allowing sequential formation of source and drain with high epi-selectivity without requiring simultaneous complex patterning
3Reliability
If a metal-containing layer is used as etching stop layer and to pattern source/drain regions, then epi-selectivity is improved, but the fabrication process becomes more complex
Solution Approach 1:
The metal-containing layer performs multiple functions: it serves as an etching stop layer to protect underlying structures, as a pattern definition layer to define source and drain regions, and as a sacrificial layer that is removed and re-deposited to enable sequential formation. This multi-functionality reduces the need for additional specialized layers and processes
Solution Approach 2:
The metal-containing layer is temporarily deposited to define the source region, then selectively removed after serving its purpose. It is subsequently re-deposited to define the drain region. This discard-and-recover approach allows the same material and process to be reused, simplifying the overall fabrication complexity while maintaining high epi-selectivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise definition and separate formation of source/drain regions for P-type and N-type FinFETs, improving the quality of epi-growth and reducing epi-selectivity loss, while being compatible with existing fabrication processes and not increasing costs.
Implementation Method 1
A first etching process is performed to remove portions of the second layer formed over the fin structure. A first etching selectivity exists between the first layer and the second layer in the first etching process, such that the first layer serves as an etching stop layer
Implementation Method 2
fin-like field effect transistor (FinFET) device... The channel of the transistor is formed in this vertical fin. A gate is provided over (e.g., wrapping around) the fin. This type of gate allows greater control of the channel
Implementation Method 3
A source/drain region is epitaxially grown on the exposed portion of the fin structure
Data Source
AI summary
A fin structure of a FinFET device is formed over a substrate. A first layer is formed over the fin structure. A gate layer is formed over the fin structure and over the first layer. The gate layer is patterned into a gate stack that wraps around the fin structure. A second layer is formed over the first layer and over the gate stack. A first etching process is performed to remove portions of the second layer formed over the fin structure, the first layer serves as an etching-stop layer during the first etching process. A second etching process is performed to remove portions of the first layer to expose a portion of the fin structure. A removal of the portions of the first layer does not substantially affect the second layer. A source/drain region is epitaxially grown on the exposed portion of the fin structure.