Metal Etch Stop Layer for Shallow Trench Depth Control
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Solution Overview
Problem
Existing methods for fabricating semiconductor devices face challenges in forming trenches of varying depths during the same etching process, as they struggle to stop etching in shallower trenches while continuing in deeper trenches, leading to inefficiencies and complexities in IC processing and manufacturing.
Innovation Solution
A method is introduced that involves forming a metal etch stop layer (ESL) structure for shallow trenches and pulling back sidewall spacers to create a wider upper portion of the metal ESL, which acts as an etch stop to prevent shallow trench etching-through, allowing for the continuous etching of deeper trenches, thereby enabling the formation of trenches with different depths during the same process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single etching process is used to form both shallow and deep trenches, then the etching process can be simplified and manufacturing efficiency improved, but the shallow trenches may be etched too deeply (etch-through) while the deep trenches are still being formed
Solution Approach 1:
The patent applies local quality by creating a metal etch stop layer structure specifically at the shallow trench locations with a wider upper portion. This localized structure provides etch stop functionality only where needed (at shallow trenches) while allowing the etching process to continue uninterrupted in deep trench locations, thus achieving both simplified single-process etching and precise depth control.
Solution Approach 2:
The metal etch stop layer structure acts as an intermediary element between the etching process and the shallow trenches. It mediates the etching action by providing a controlled stop point at the shallow trench locations, enabling the etch to proceed to the full depth of deep trenches without over-etching the shallow trenches.
2Manufacturing precision
If separate etching processes are used for shallow and deep trenches, then trench depth control is improved, but the manufacturing complexity and processing time increase
Solution Approach 1:
The patent merges the formation of shallow and deep trenches into a single etching process by introducing a metal etch stop layer structure. This structure enables both trench types to be etched simultaneously in one process step, reducing the number of separate etching processes needed while maintaining precise depth control through the etch stop mechanism.
Solution Approach 2:
The metal etch stop layer structure is formed preliminarily before the etching process begins. This preliminary action of creating the etch stop structure with its wider upper portion prepares the system to automatically differentiate between shallow and deep trench locations during the single etching process, eliminating the need for separate etching steps.
3Productivity
If the etching process continues uniformly across all trenches, then the process is simple and fast, but the shallow trenches cannot be stopped at the desired depth
Solution Approach 1:
The metal etch stop layer structure provides localized etch stop functionality at shallow trench positions. The wider upper portion of this structure creates a physical barrier that stops the etching reaction locally at shallow trenches while allowing uniform continued etching in deep trench regions, thus maintaining both process speed and depth precision.
Solution Approach 2:
The patent converts the potentially harmful effect of uniform continuous etching (which would cause over-etching of shallow trenches) into a beneficial selective process. The metal etch stop layer structure transforms the uniform etching action into a selective process that automatically stops at shallow trenches while continuing in deep trenches, turning a disadvantage into an advantage.
Data Source
AI summary
A semiconductor device includes a gate structure disposed over a substrate, and a first dielectric layer disposed over the substrate, including and over the gate structure. A first metal feature is disposed in the first dielectric layer, including an upper portion having a first width and a lower portion having a second width that is different than the first width. A dielectric spacer is disposed along the lower portion of the first metal feature, wherein the upper portion of the first metal feature is disposed over the dielectric spacer. A second dielectric layer is disposed over the first dielectric layer, including over the first metal feature and a second metal feature extends through the second dielectric layer to physically contact with the first metal feature. A third metal feature extends through the second dielectric layer and the first dielectric layer to physically contact the gate structure.