Metal Interconnect Filling With Alternating Bias Sputtering
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Solution Overview
Problem
As semiconductor devices integrate more densely, the narrow line widths of metal interconnections pose challenges during metal deposition, leading to potential clogging of recessed regions and the formation of voids, which can hinder stable device operation.
Innovation Solution
A method involving alternating sputtering deposition processes with different bias voltages is employed to form a metal layer within the recessed region. The first process uses a low bias voltage to deposit a sacrificial metal pattern, while the second process, with a higher bias voltage, etches the first portion and resputters the second portion to fill the opening, repeating this process to achieve the desired thickness and prevent clogging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional metal deposition methods are used to form narrow line width metal interconnections, then integration density is improved, but the entrance of recessed regions becomes clogged and voids form
Solution Approach 1:
The patent applies periodic action by alternating between low bias voltage deposition (to fill the opening) and high bias voltage deposition (to thin the upper metal layer and prevent clogging). This periodic switching of bias voltages during sputtering enables controlled metal layer formation that maintains opening accessibility while achieving the desired fill, thereby preventing voids and ensuring reliable device operation
Solution Approach 2:
The patent changes the bias voltage parameter during the metal deposition process. By switching between low bias voltage (for filling) and high bias voltage (for thinning and preventing clogging), the deposition characteristics are dynamically adjusted to simultaneously achieve opening fill and maintain entrance accessibility, resolving the contradiction between narrow line width and device reliability
2Area of moving object
If the recessed region entrance is clogged during metal deposition, then narrow line width is achieved, but voids form in the recessed region
Solution Approach 1:
The periodic alternation between low and high bias voltage deposition cycles enables the metal layer to be deposited uniformly throughout the recessed region. The low bias voltage phases allow metal to reach and fill the bottom of the opening, while the high bias voltage phases prevent excessive buildup at the entrance, ensuring uniform thickness and preventing void formation
Solution Approach 2:
By dynamically changing the bias voltage parameter during deposition, the patent controls the metal atom trajectory and deposition rate. Low bias voltage promotes vertical deposition into the opening, while high bias voltage creates more angular deposition that thins the upper layers, together achieving uniform metal layer formation without voids
3Quantity of substance
If sputtering deposition is performed with low bias voltage, then metal is deposited in the opening, but the upper surface metal layer becomes too thick causing clogging
Solution Approach 1:
The patent uses periodic action by alternating deposition cycles: low bias voltage phases deposit metal into the opening to build up the necessary quantity, while high bias voltage phases subsequently thin the upper surface layer to maintain opening accessibility. This periodic switching prevents clogging while ensuring adequate metal fill
Solution Approach 2:
The bias voltage parameter is changed between deposition phases to control metal layer thickness distribution. Low bias voltage increases vertical deposition flux into the opening, while high bias voltage increases lateral sputtering that reduces upper surface thickness, thereby maintaining the balance between fill quantity and opening accessibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents clogging and ensures uniform metal deposition within the recessed region, enhancing the reliability and stability of semiconductor devices by maintaining the integrity of the metal interconnections.
Implementation Method 1
performing a first sputtering deposition process using a first bias voltage to form a first metal pattern
Implementation Method 2
forming a second metal layer on the first metal layer using electroplating
Data Source
AI summary
A method of fabricating a semiconductor device includes forming a dielectric layer on a lower structure. The method includes forming an opening to penetrate through the dielectric layer. The method includes alternately repeating a first operation, in which a first sputtering deposition process is performed to form a first metal pattern in the opening, and a second operation, in which a second sputtering deposition process is performed to form a second metal pattern in the opening, two or more times to form a first metal layer. The method includes forming a second metal layer on the first metal layer in an electroplating manner, and planarizing the first and second metal layers. Moreover, first and second process times, during which the first sputtering deposition process and the second sputtering deposition process, respectively, are performed, are each about five seconds or less.