Metal-Filled DBC Substrate Indentations for Delamination Resistance
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Solution Overview
Problem
Conventional direct bonded copper (DBC) substrates are prone to delamination due to a significant coefficient of thermal expansion mismatch between the copper layers and the ceramic substrate, which reduces their thermal performance.
Innovation Solution
The introduction of metal-filled dimples in the ceramic substrate, which act as anchors for the copper layers, improving mechanical reliability and reducing thermal resistance by shortening the thermal path through the ceramic substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DBC substrates are used with copper layers bonded to ceramic substrate, then electrical connectivity and basic thermal conduction are achieved, but delamination occurs due to CTE mismatch between copper and ceramic
Solution Approach 1:
The patent applies local quality by creating dimples at specific locations on the ceramic substrate where CTE mismatch stress concentrates. These localized indentations are then filled with metal having CTE matched to copper, providing localized stress compensation exactly where needed at the bond interface, rather than requiring uniform modification across the entire substrate.
Solution Approach 2:
The patent employs composite materials by combining ceramic substrate, copper layers, and metal-filled dimples into a multi-material structure. The metal filler material is specifically selected to have CTE properties that bridge the gap between ceramic and copper, creating a composite bond interface that accommodates thermal expansion differences and prevents delamination.
2Reliability
If dimples are created in ceramic substrate to reduce delamination, then bond strength is improved, but thermal performance deteriorates due to increased thermal resistance
Solution Approach 1:
The patent applies parameter changes by modifying the dimple fill material from void or low-conductivity material to high-conductivity metal. This changes the thermal conductivity parameter of the dimple region from poor to excellent, allowing the dimples to serve their mechanical stress-relief function while maintaining optimal thermal conduction pathways through the substrate.
Solution Approach 2:
The patent uses composite materials by filling the dimples with metal that provides both mechanical anchoring and thermal conduction. The metal-filled dimples create a composite structure where the metal serves dual purposes: mechanically anchoring the copper layer to prevent delamination and thermally conducting heat away from the bond interface, thus improving both reliability and thermal performance simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the thermal performance and mechanical reliability of DBC substrates by providing a stronger bond between the copper and ceramic layers, reducing delamination risk and thermal resistance, as demonstrated by improved temperature management in power modules.
Implementation Method 1
The plurality of indentations are filled with a metal filler to provide thermal anchors that conduct heat away from the semiconductor die
Implementation Method 2
a copper-oxygen eutectic forms at the copper to a ceramic interface which bonds both to the copper of the copper sheets and the oxide of the ceramic substrates
Implementation Method 3
heating the copper sheets and ceramic substrate to a carefully controlled temperature in an atmosphere of nitrogen for ceramic oxide materials containing about 20 to 40 parts per million (ppm) of oxygen
Data Source
AI summary
A semiconductor device includes a direct bonded copper (DBC) substrate including a plurality of indentations in at least a top side of a ceramic substrate. The plurality of indentations are filled with a metal filler to provide metal filled dimples. A top copper layer is a patterned layer that is on the top side and provides leads, and there is at least one semiconductor die having bond pads electrically connected to the leads.


