Multi-Layer Metal Frame Power Package With 3D High-Inductance Paths
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Solution Overview
Problem
Existing solutions for integrating voltage converters with high-performance processors face challenges in reducing size while maintaining performance, particularly due to limitations in silicon-integrated inductors that struggle with large inductance and parasitic losses.
Innovation Solution
A multilevel conductive wiring network using planar conductive metal sheets with air gaps and magnetic slabs to form high-inductance paths, allowing for vertical stacking and integration of components, leveraging thick metal interconnects and magnetic materials to enhance inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If silicon-integrated inductors are used to minimize package size, then volume is reduced, but inductance value is limited and parasitic losses increase
Solution Approach 1:
The patent transitions from planar 2D inductor traces to a 3D vertical structure using multiple stacked metal layers with air gaps. This dimensional change allows current to flow through the thickness of the package rather than only laterally, dramatically increasing the effective inductance value while maintaining compact footprint. The multi-layer configuration with air gaps creates a magnetic path that充分利用 the vertical space, resolving the contradiction between small volume and sufficient inductance.
Solution Approach 2:
The patent employs a composite structure combining multiple conductive metal layers with air gap regions and magnetic materials. This composite approach creates an inductor that leverages the high conductivity of metals, the insulating and magnetic properties of air gaps, and the magnetic permeability of magnetic materials to achieve high inductance with low parasitic losses in a compact volume, directly addressing the performance limitations of pure silicon-integrated solutions.
2Ease of manufacture
If multiple components are placed side-by-side on a substrate, then manufacturing is simplified, but package area increases
Solution Approach 1:
The patent stacks multiple functional layers vertically to create a 3D integrated structure, transitioning from lateral placement to vertical integration. This allows multiple components (inductors, capacitors, interconnects) to occupy the same horizontal footprint by distributing them across different vertical levels, dramatically reducing package area while maintaining manufacturability through standard semiconductor fabrication processes adapted for 3D integration.
Solution Approach 2:
The patent merges multiple discrete components into a single integrated 3D structure where inductors, capacitors, and interconnects are combined in a unified multi-layer architecture. This consolidation eliminates the need for separate component packages and interconnections, reducing overall package footprint while simplifying the assembly process through monolithic fabrication techniques.
3Reliability
If thick metal interconnects are used to increase inductance, then inductance value improves, but parasitic losses increase
Solution Approach 1:
The patent segments the current path into multiple discrete metal layers separated by air gaps, rather than using a single thick metal trace. This segmentation allows the magnetic field to be concentrated in the air gap regions between layers, increasing inductance efficiency. The separated structure also reduces skin effect and proximity effect losses that occur in single thick conductors, thereby reducing parasitic losses while maintaining high inductance value.
Solution Approach 2:
The patent introduces air gaps as intermediary regions between conductive metal layers. These air gaps serve as magnetic flux concentrators that enhance the magnetic field strength and inductance value without requiring increased conductor size. The air gaps act as mediators that decouple the electrical conductors from direct contact, reducing eddy current losses and other parasitic effects while maintaining strong magnetic coupling for high inductance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves compact size and improved performance by overcoming silicon-integrated inductor limitations, enabling efficient current density and reduced volume without significant parasitic losses.
Implementation Method 1
magnetic slabs to form high-inductance paths
Implementation Method 2
form high-inductance paths, allowing for vertical stacking and integration of components, leveraging thick metal interconnects and magnetic materials to enhance inductance
Data Source
AI summary
An electronics assembly includes a plurality of planar conductive metal sheets including a first conductive metal sheet, a second conductive metal sheet attached and electrically coupled to the first metal sheet, and a third conductive metal sheet attached and electrically coupled to the second metal sheet. The second metal sheet is located between the first and third conductive metal sheets. Air gaps are defined in the plurality of planar conductive metal sheets to form metal traces that define electrically isolated conductive paths from an outer surface of the first conductive metal sheet to an outer surface of the third conductive metal sheet in a multilevel conductive wiring network. The multilevel conductive wiring network can be attached and electrically coupled to a microchip and to one or more capacitors to form a power converter.