Metal Fuse Width Control via 3D Trench Topology
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Solution Overview
Problem
Conventional fabrication methods for fuse structures in integrated circuits are limited in controlling the width of fuse structures, leading to inefficiencies in overcurrent protection due to the size constraints imposed by photolithography, which affects the ability to manage varying current levels effectively.
Innovation Solution
The technique involves forming a three-dimensional surface with predetermined dimensions and depositing a layer to create a recess with desired fuse structure dimensions, allowing for the formation of fuse structures with controlled width and thickness, enabling precise overcurrent protection by adjusting the topology of adjacent features.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods are used to form fuse structures, then the manufacturing process is simple and straightforward, but the width control precision is limited to 20-30 nm due to photolithography constraints
Solution Approach 1:
The patent transitions from two-dimensional planar patterning to three-dimensional vertical structuring. By forming trenches with controlled depths and filling them with conductive material, the fuse structure width is determined by the trench dimensions rather than photolithography resolution, achieving sub-20 nm precision through vertical dimension control.
Solution Approach 2:
The patent replaces the photolithography-based mechanical patterning system with a chemical etching and deposition system. Trenches are formed through chemical etching processes, and fuse structures are created through material deposition and selective removal, allowing precision controlled by chemical reaction rates and deposition thickness rather than optical diffraction limits.
2Adaptability or versatility
If the cross-sectional area of fuse structures is reduced to handle lower currents, then the ability to protect against overcurrents is improved, but the fabrication precision requirements increase beyond conventional capabilities
Solution Approach 1:
The patent applies different properties to different parts of the fuse structure. The trench walls are engineered with specific profiles, and the conductive material is deposited with controlled thickness and distribution. This local control of geometry and material properties enables precise cross-sectional area control, allowing customization for different current levels without requiring uniform high-precision fabrication throughout the entire structure.
Solution Approach 2:
The patent controls the cross-sectional area by adjusting multiple parameters including trench depth, trench width, conductive material thickness, and etch/deposition conditions. By independently controlling these parameters, the fuse cross-sectional area can be precisely tuned for different current protection levels, achieving adaptability across a wide range of current values.
3Ease of manufacture
If photolithography is used for patterning, then the fabrication process is conventional and well-established, but the minimum feature size is limited to 20-30 nm
Solution Approach 1:
The patent performs preliminary trench formation and wall preparation before depositing the conductive fuse material. By pre-defining the trench geometry and treating the walls, the subsequent deposition process can focus solely on controlling material thickness, achieving high precision without requiring high-precision photolithography patterning of the fuse structure itself.
Solution Approach 2:
The patent introduces trenches as an intermediary structure between the photolithography pattern and the final fuse structure. The trenches act as molds that define the fuse geometry, decoupling the photolithography resolution from the final fuse width. This intermediary approach allows conventional photolithography to be combined with high-precision fuse structure formation.
Data Source
Figure 1A~1C
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AI summary
Embodiments of the present disclosure describe techniques and configurations for overcurrent fuses in integrated circuit (IC) devices. In one embodiment, a device layer of a die may include a first line structure with a recessed portion between opposite end portions and two second line structures positioned on opposite sides of the first line structure. An isolation material may be disposed in the gaps between the line structures and in a first recess defined by the recessed portion. The isolation material may have a recessed portion that defines a second recess in the first recess, and a fuse structure may be disposed in the second recess. Other embodiments may be described and/or claimed.