Metal Gate Adhesion Layer for Semiconductor Devices
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Solution Overview
Problem
Conventional semiconductor device manufacturing processes face challenges in achieving optimal adhesion and reducing diffusion between metal gate layers and subsequent dielectric layers, leading to potential delamination and performance issues in transistors.
Innovation Solution
The formation of an adhesion layer between two metals in the gate structure, along with a buffer layer such as an oxide layer on the gate structure, improves adhesion and reduces diffusion, enhancing the stability of the metal gate layers and subsequent dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If metal gate layers are deposited directly on dielectric layers, then manufacturing process is simple, but adhesion is poor and diffusion occurs causing delamination
Solution Approach 1:
An adhesion layer is introduced as an intermediary between the metal gate layer and the dielectric layer. This adhesion layer serves as a mediator that prevents direct contact between the metal and dielectric, thereby eliminating diffusion issues and delamination while maintaining manufacturing simplicity.
Solution Approach 2:
The gate structure employs a composite material approach by combining multiple layers including the adhesion layer, metal gate layer, and dielectric layer. Each layer is selected for its specific properties, creating a composite structure that achieves both good adhesion and diffusion prevention while remaining manufacturable.
2Reliability
If adhesion layer and buffer layer are added to gate structure, then adhesion and stability improve, but device complexity increases
Solution Approach 1:
The gate structure is segmented into distinct functional layers: an adhesion layer for bonding, a buffer layer for stress management and diffusion prevention, and the metal gate layer for electrical function. This segmentation allows each layer to be optimized for its specific purpose while maintaining overall structural integrity and managing complexity through clear functional division.
Data Source
AI summary
Gate structures and methods of forming the gate structures are described. In some embodiments, a method includes forming source/drain regions in a substrate, and forming a gate structure between the source/drain regions. The gate structure includes a gate dielectric layer over the substrate, a work function tuning layer over the gate dielectric layer, a first metal over the work function tuning layer, an adhesion layer over the first metal, and a second metal over the adhesion layer. In some embodiments, the adhesion layer can include an alloy of the first and second metals, and may be formed by annealing the first and second metals. In other embodiments, the adhesion layer can include an oxide of at least one of the first and/or second metal, and may be formed at least in part by exposing the first metal to an oxygen-containing plasma or to a natural environment.