Metal Gate Capping Layer for Threshold Voltage Consistency
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Solution Overview
Problem
The weak corner turn on (WCTO) effect in metal gate transistors with short channel lengths prevents the threshold voltage from decreasing, leading to inconsistent performance across transistors with varying channel lengths, as aluminum ions implanted into the N-work function metal layer do not diffuse evenly to the bottom corner of the metal gate.
Innovation Solution
A semiconductor structure with a metal gate featuring an engineered capping layer that allows more aluminum atoms to diffuse to the bottom corner of the metal gate, achieved by designing a non-uniform thickness profile for the capping layer sidewall, where the thickness is thicker near the interface with the high-k dielectric layer and thinner towards the top, to address the WCTO effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If aluminum ions are implanted into the N-work function metal layer, then the threshold voltage is reduced, but the aluminum ions do not diffuse evenly to the bottom corner of the metal gate, causing inconsistent performance across transistors with varying channel lengths
Solution Approach 1:
The capping layer is designed with non-uniform thickness to create different local conditions for aluminum diffusion. The thickness varies from the bottom corner region to the top region of the metal gate, allowing optimized aluminum distribution in different areas. This local variation in capping layer structure enables improved threshold voltage consistency while maintaining controlled aluminum diffusion patterns.
Solution Approach 2:
The thickness parameter of the capping layer is deliberately changed across different spatial locations. By varying the capping layer thickness from thicker at the bottom corner to thinner at the top, the diffusion characteristics of aluminum ions are modified. This parameter change enables enhanced aluminum atom diffusion to the bottom corner region, resolving the uniformity issue in threshold voltage across different channel lengths.
2Manufacturing precision
If the capping layer thickness is made non-uniform to improve aluminum diffusion, then the manufacturing complexity increases, but this enables consistent threshold voltage reduction across all channel lengths
Solution Approach 1:
The capping layer is designed with non-uniform thickness to create different local conditions for aluminum diffusion. The thickness varies from the bottom corner region to the top region of the metal gate, allowing optimized aluminum distribution in different areas. This local variation in capping layer structure enables improved threshold voltage consistency while maintaining controlled aluminum diffusion patterns.
Solution Approach 2:
The thickness parameter of the capping layer is deliberately changed across different spatial locations. By varying the capping layer thickness from thicker at the bottom corner to thinner at the top, the diffusion characteristics of aluminum ions are modified. This parameter change enables enhanced aluminum atom diffusion to the bottom corner region, resolving the uniformity issue in threshold voltage across different channel lengths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in a consistent reduction of threshold voltage across all channel lengths, improving the electronic performance of the metal gate by ensuring even aluminum distribution, with an observed Ion-Isoff gain of 2% to 5%.
Implementation Method 1
allows more aluminum atoms to diffuse to the bottom corner of the metal gate
Data Source
AI summary
The present disclosure provides a semiconductor structure includes a semiconductor layer having a surface, and an interlayer dielectric (ILD) defining a metal gate over the surface of the semiconductor layer. The metal gate includes a high-k dielectric layer, a capping layer, and a work function metal layer. A thickness of the capping layer sidewall distal to a corner of the capping layer, is substantially thinner than a thickness which is around center of the capping layer bottom. The present disclosure provides a method for manufacturing a semiconductor structure. The method includes forming a metal gate recess, forming a high-k dielectric layer, forming a first capping layer, forming a second capping layer on the first capping layer, removing or thinning down the first capping layer sidewall, and removing the second capping layer.