Metal Gate Cut Etching for Uniform Depth Across Widths

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Solution Overview

Problem

As integrated circuits shrink in size, forming gate cuts with different widths but similar heights becomes challenging due to limitations in current fabrication technologies, leading to issues with device isolation and backside structure disruption.

Innovation Solution

The use of distinct plasma-based etching processes to form gate cuts of varying widths, with wider cuts having shorter etch durations to maintain similar depths, allowing for gate cuts with height-to-width aspect ratios of 5:1 or higher and ensuring consistent height within 10% of each other.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single etching process is used to form gate cuts of different widths, then the process is simple, but the height control becomes poor due to loading effects

Engineering Contradiction:
Improveetching process simplicityVSAvoidgate cut height consistency
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent divides the gate cut formation into multiple separate etching processes: a first etching process forms initial gate cuts, and a second etching process forms additional gate cuts. This segmentation allows each etching process to be optimized independently for its specific width requirements, thereby achieving consistent height control across gate cuts of different widths while maintaining process simplicity through modular fabrication steps.

Inventive Principle:
Principle #1Segmentation

2Length of stationary object

If longer etching duration is used to achieve sufficient depth, then the gate cuts reach required depth, but backside structures are disrupted

Engineering Contradiction:
Improvegate cut depthVSAvoidbackside structure disruption
Core Design Contradiction:
Length of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent performs preliminary actions by forming masking structures and sacrificial structures before the etching processes. These preliminary structures define precise etch boundaries and protect backside structures from damage. The masking structures are formed with specific patterns that guide the etching depth, ensuring that gate cuts reach the required depth without extending too deep and disrupting backside structures.

Inventive Principle:
Principle #10Preliminary action

3Area of stationary object

If wider gate cuts are formed, then isolation is improved, but the etching depth becomes excessive relative to the width

Engineering Contradiction:
Improvegate cut widthVSAvoidheight-to-width ratio control
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent applies local quality by using different etching parameters and masking structures for different gate cut locations. Wider gate cuts are formed with etching conditions optimized for their specific width, while narrower gate cuts use different conditions. This localized optimization ensures that each gate cut achieves the appropriate height-to-width ratio for its specific width, preventing excessive depth relative to width while maintaining effective isolation.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of gate cuts with different widths while maintaining similar heights, improving device isolation and preventing backside structure disruption, thus enhancing the fabrication of densely packed transistors.

Implementation Method 1

Employing different plasma-based etching processes to form gate cuts of different widths

Methodology Applied
Scientific EffectPlasma etching: Plasma

Data Source

PatentEP4345878A1Forming metal gate cuts using multiple passes for depth control
Publication Date: 2024.04.03 INTEL CORP
  • EP4345878A1 patent drawingFigure 1A~1B
  • EP4345878A1 patent drawingFigure 2A~2B
  • EP4345878A1 patent drawingFigure 2C~2D

AI summary

Techniques are provided herein to form semiconductor devices that include gate cuts with different widths (e.g., at least a 1.5x difference in width) but substantially the same height (e.g., less than 5 nm difference in height). A given gate structure extending over one or more semiconductor regions may be interrupted with any number of gate cuts that each extend through an entire thickness of the gate structure. According to some embodiments, gate cuts of a similar first width are formed via a first etching process while gate cuts of a similar second width that is greater than the first width are formed via a second etching process that is different from the first etching process. Using different etch processes for gate cuts of different widths maintains a similar height for the gate cuts of different widths.