Metal Gate Cut Plug Layout for Tighter Nanowire Transistor Spacing
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Solution Overview
Problem
The challenge of maintaining mobility improvement and short channel control in microelectronic devices as device dimensions scale below the 10 nanometer node, particularly in multi-gate and nanowire transistors, is exacerbated by the constraints on lithographic processes used to pattern features, leading to a trade-off between critical dimension and spacing.
Innovation Solution
The implementation of a 'plug-last' approach in integrated circuit fabrication, where metal gate cuts and trench contact plugs are formed after gate dielectric and work function metal deposition, allowing for reduced-dimension dielectric structures and seamless metal fill, thereby alleviating space constraints and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional lithographic processes are used to pattern features in multi-gate and nanowire transistors, then device dimensions can be scaled down, but the spacing between features must be increased to maintain manufacturing precision
Solution Approach 1:
The patent inverts the conventional sequence by forming metal gate cuts and trench contact plugs after gate dielectric and work function metal deposition, rather than before. This reversal allows the plugs to be formed in a relaxed dimensional space, avoiding the lithographic spacing constraints that would otherwise limit how closely features can be spaced.
Solution Approach 2:
The patent transitions from two-dimensional planar patterning constraints to three-dimensional structure formation. By forming the plugs after deposition in the vertical dimension, the process bypasses the lithographic spacing limitations that constrain horizontal feature spacing, effectively adding a dimensional degree of freedom to the manufacturing process.
2Productivity
If device dimensions are scaled below 10 nanometer node, then increased density of functional units is achieved, but maintaining mobility improvement and short channel control becomes challenging
Solution Approach 1:
The patent performs preliminary deposition of gate dielectric and work function metal layers before forming the metal gate cuts and trench contact plugs. This preliminary action establishes the gate structure framework first, allowing subsequent plug formation to proceed without compromising the integrity of the gate dielectric or work function metal, thereby maintaining device reliability at scaled dimensions.
Solution Approach 2:
The patent segments the gate structure formation into distinct stages: first depositing gate dielectric and work function metal, then subsequently forming metal gate cuts and trench contact plugs. This segmentation allows each component to be optimized independently, maintaining short channel control through proper gate dielectric formation while enabling high density through aggressive spacing of the segmented plug structures.
3Productivity
If tighter spacing is implemented to increase device density, then productivity is improved, but process variation increases
Solution Approach 1:
The patent introduces gate dielectric and work function metal layers as intermediary structures that mediate between the final plug positions and the underlying substrate. These intermediary layers provide a uniform foundation that decouples the plug spacing from direct lithographic constraints, allowing tighter spacing while maintaining manufacturing precision through the smoothing and uniformity provided by the deposited layers.
Data Source
AI summary
Integrated circuit structures having uniform grid metal gate and trench contact cuts plugged with reduced-dimension dielectric structures are described. For example, an integrated circuit structure includes a vertical stack of horizontal nanowires or a fin. A gate electrode is over the vertical stack of horizontal nanowires or the fin. A conductive trench contact structure is adjacent to the gate electrode. A dielectric sidewall spacer is between the gate electrode and the conductive trench contact structure. A dielectric cut plug structure extends through the gate electrode, through the dielectric sidewall spacer, and through the conductive trench contact. The dielectric cut plug structure has a lateral width adjacent to the gate electrode less than a lateral width adjacent to the conductive trench contact structure.