Metal Gate Transistor Fabrication with Fluorinated High-k Dielectric
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Solution Overview
Problem
Metal-oxide semiconductor transistors with polysilicon gate electrodes suffer from depletion regions that increase the thickness of the gate dielectric layer, reduce capacitance, and lower device performance, while metal gates with high-k dielectric layers face lattice defects and vacancies that deteriorate transistor efficiency.
Innovation Solution
A method of fabricating a metal gate transistor involves forming a high-k dielectric layer, implanting fluoride ions into it, followed by a polysilicon gate formation, and then replacing the polysilicon gate with a metal gate, thereby addressing lattice defects and vacancies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal gates with high-k dielectric layers are used to replace polysilicon gate electrodes, then gate capacitance is improved and depletion effect is reduced, but lattice defects and vacancies are formed that deteriorate transistor efficiency
Solution Approach 1:
Fluoride ion implantation is performed into the high-k dielectric layer before metal gate formation to prevent lattice defects and vacancies from forming during subsequent processing steps. This preliminary action addresses the harmful effects before they can deteriorate transistor efficiency.
Solution Approach 2:
Fluoride ions are introduced as an intermediary substance into the high-k dielectric layer to passivate lattice defects and vacancies. The fluoride ions act as a mediator that repairs the crystal structure without compromising the high-k properties of the dielectric layer.
2Reliability
If fluoride ions are implanted into the high-k dielectric layer, then lattice defects are reduced and transistor efficiency is improved, but precise control of ion placement is required to avoid affecting device performance
Solution Approach 1:
The implantation process parameters including ion energy, dose, and angle are precisely controlled and optimized to ensure fluoride ions are placed at the correct depth within the high-k dielectric layer. This parameter control achieves both defect reduction and manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces drain-induced barrier lowering, flicker noise, and negative bias temperature instability, enhancing the efficiency of the metal gate transistor by repairing lattice defects and maintaining precise control over fluorine ion placement.
Implementation Method 1
an ion implantation process is performed to implant fluoride ions into the high-k dielectric layer
Data Source
AI summary
A method of fabricating a metal gate transistor includes providing a substrate. Then, a high-k dielectric layer is formed to cover the substrate. Later, an ion implantation process is performed to implant fluoride ions into the high-k dielectric layer. After the ion implantation process, a polysilicon gate is formed on the high-k dielectric layer. Next, an interlayer dielectric layer is formed to cover the substrate and the polysilicon gate. Finally, the polysilicon gate is replaced by a metal gate.