Semiconductor Metal Gate Void Prevention via Funnel Cavity

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Solution Overview

Problem

In semiconductor device manufacturing, the formation of metal gate members with small critical dimensions and large aspect ratios often results in unwanted voids, compromising the quality, performance, and reliability of the devices due to deposition challenges in narrow cavities.

Innovation Solution

A method involving the formation of a cavity with a trapezoidal cross-section and a dummy gate structure, including a polycrystalline silicon dummy gate member, an intermediate metal layer, and a silicon oxide and nitride mask layer, where the cavity is etched to create a funnel structure for metal deposition, minimizing voids by controlling etch rates and layer thicknesses to ensure proper metal gate formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If metal material is deposited into a cavity with small critical dimension and large aspect ratio, then the metal gate member can be formed with required dimensions, but unwanted voids are formed in the metal gate member

Engineering Contradiction:
Improvecritical dimension of metal gate memberVSAvoidquality of metal gate member
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A dummy gate structure is formed beforehand to define the cavity geometry before metal deposition. The dummy gate structure includes a dummy gate member with specific dimensions that pre-establish the cavity's critical dimension and aspect ratio, enabling controlled metal deposition without void formation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy gate structure acts as an intermediary element that facilitates the formation of the metal gate member. It temporarily occupies the gate region, allows cavity definition and metal deposition, and is subsequently removed to leave a void-free metal gate member with precise dimensions

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the cavity width is reduced to achieve small critical dimension, then the metal gate member can be formed with small critical dimension, but metal deposition becomes difficult and voids are formed

Engineering Contradiction:
Improvecritical dimension of cavityVSAvoidmetal deposition process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The dummy gate structure is formed in advance to pre-define the narrow cavity width. This preliminary structuring allows the metal deposition process to proceed uniformly even in narrow cavities, as the dummy gate provides a stable reference geometry that guides metal material deposition without causing voids

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents unwanted voids in the metal gate member, leading to improved quality, performance, and reliability of semiconductor devices by facilitating uniform metal deposition through the funnel structure.

Implementation Method 1

removing each of the mask layer, a portion of the etch-stop material layer that is positioned above the intermediate layer, and a portion of the dielectric material layer that is positioned above the intermediate layer

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

providing a set of gate metal material through the first cavity portion into the second cavity portion for forming a metal gate member

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS9520483B2Method for manufacturing semiconductor device
Publication Date: 2016.12.13 SEMICON MFG INT (SHANGHAI) CORP
  • US9520483B2 patent drawing
  • US9520483B2 patent drawing
  • US9520483B2 patent drawing

AI summary

A method for manufacturing a semiconductor device may include forming a cavity between two insulating portions that are positioned on a semiconductor substrate. The cavity may include a first cavity portion and a second cavity portion. The second cavity portion may be positioned between the semiconductor substrate and the first cavity portion. A width of the second cavity portion may be less than a width of the first cavity portion. The method may further include providing a set of gate metal material through the first cavity portion into the second cavity portion for forming a metal gate member of the semiconductor device.