Metal Gate Height Restoration Using Selective Silicon Oxide
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Solution Overview
Problem
As semiconductor devices progress to nanometer technology process nodes, high gate heights and aspect ratios lead to gate incline or collapse, and repeated processing steps degrade gate electrodes, causing height shrinkage, which can damage devices during overlying layer formation.
Innovation Solution
The method involves selectively forming a silicon oxide layer on gate electrode structures or interlayer dielectric layers using a reaction between a silicon halide, such as silicon tetrachloride, and oxygen, to increase the height of these structures during semiconductor processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate height is increased to maintain proper levels during processing, then device reliability is improved, but gate aspect ratio increases leading to gate incline or collapse
Solution Approach 1:
The method performs preliminary actions by forming mandrel structures and spacer layers before final gate electrode formation. This allows the gate structure to be built incrementally with proper support structures in place, preventing collapse during subsequent processing while achieving the necessary height without excessive aspect ratio
Solution Approach 2:
The invention introduces intermediary structures including mandrels and spacer layers that act as temporary support elements during fabrication. These intermediary structures provide mechanical support to the gate electrode during processing, preventing incline or collapse while allowing the gate to reach the required height for device reliability
2Quantity of substance
If multiple processing steps are performed to increase device density, then device density is improved, but gate electrode height shrinks due to degradation
Solution Approach 1:
The method performs preliminary height restoration actions after critical processing steps. By forming oxide layers or adding dielectric materials at strategic points in the process flow, the gate height is restored before subsequent degradation-prone steps, ensuring the gate maintains proper height throughout multiple processing cycles
Solution Approach 2:
The invention implements periodic height restoration actions interspersed among the processing steps. Rather than a single correction, the method periodically adds material or performs oxidation to restore gate height at multiple stages, counteracting cumulative degradation from repeated processing while maintaining high device density
3Stability of the object's composition
If gate height is reduced to prevent collapse, then gate stability is improved, but device damage occurs during overlying layer formation
Solution Approach 1:
The invention introduces intermediary support structures such as mandrels and spacer layers that provide mechanical reinforcement to the gate structure. These intermediaries act as scaffolding during fabrication, allowing the gate to maintain stability while reaching the height necessary to prevent damage during overlying layer formation
Solution Approach 2:
The method creates composite gate structures combining multiple materials with complementary properties. By integrating different dielectric materials, conductive layers, and structural elements, the gate achieves both the stability needed to prevent collapse and the height required to avoid damage during subsequent processing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively maintains proper gate height and prevents damage during subsequent processing steps, enhancing the yield and reliability of semiconductor manufacturing.
Implementation Method 1
selectively forming a silicon oxide layer on gate electrode structures or interlayer dielectric layers using a reaction between a silicon halide, such as silicon tetrachloride, and oxygen
Implementation Method 2
forming a silicon oxide layer on gate electrode structures or interlayer dielectric layers using a reaction between a silicon halide, such as silicon tetrachloride, and oxygen
Data Source
AI summary
A method for fabricating a semiconductor device comprises forming a gate electrode structure over a first region of a semiconductor substrate, and forming a source/drain region on a second region of the semiconductor substrate. The gate electrode structure comprises a metal gate electrode layer, a gate dielectric layer, and gate sidewalls. The second region of the semiconductor substrate is on an opposing side of the metal gate electrode layer. The method for fabricating a semiconductor device further comprises forming an interlayer dielectric layer over the source/drain regions and the gate sidewall, and forming an oxide layer over the source/drain region and the gate sidewall without substantially forming the second oxide layer on the gate electrode layer.