Metal Gate Stack Isolation Structure for Scaled Semiconductor Nodes
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to form reliable semiconductor devices at increasingly smaller sizes, as the scaling-down process complicates processing and manufacturing due to the decreasing feature sizes.
Innovation Solution
The process involves forming multiple dummy gate stacks over a semiconductor substrate, followed by the deposition of a dielectric layer to surround them. After removing the dummy gate stacks to form trenches, metal gate stacks are formed within these trenches. A cut-metal-gate opening is created to separate the metal gate stacks, and an insulating structure is formed within this opening to electrically isolate the metal gate stacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are decreased to increase functional density, then production efficiency is improved and costs are lowered, but processing and manufacturing complexity increases and device reliability becomes more difficult to ensure
Solution Approach 1:
The patent applies preliminary action by forming a sacrificial dummy gate stack structure before forming the actual metal gate stack. The dummy gate stack serves as a template that guides the subsequent formation of the metal gate stack, ensuring proper alignment and structure. After the metal gate stack is formed, the sacrificial dummy gate stack is removed. This preliminary structuring enables reliable metal gate stack formation at scaled dimensions by providing a pre-established framework that simplifies the manufacturing process and ensures device reliability.
2Productivity
If feature sizes are decreased to increase functional density, then production efficiency is improved and costs are lowered, but processing and manufacturing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the gate stack formation process into distinct phases: first forming a sacrificial dummy gate stack structure, then forming the metal gate stack around it, and finally removing the sacrificial structure. This segmentation of the manufacturing process into discrete, manageable steps reduces processing complexity by breaking down the complex task of forming metal gate stacks at scaled dimensions into sequential operations, each with clearly defined objectives and procedures.
3Ease of manufacture
If metal gate stack layers are formed directly without sacrificial structures, then the process is simpler, but deposition quality and uniformity are compromised leading to short circuiting or current leakage
Solution Approach 1:
The patent applies the intermediary principle by introducing a sacrificial dummy gate stack structure that mediates between the deposition process and the final metal gate stack structure. The dielectric layer surrounding the sacrificial structure acts as an intermediary template that guides metal deposition, ensuring uniform thickness and proper positioning. This intermediary structure enables precise control of gate stack dimensions and prevents defects like short circuits and current leakage by providing a physical framework during the deposition process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the quality and reliability of metal gate stack layers by allowing for better deposition and reducing issues like short circuiting or current leakage, while also simplifying the process of ensuring uniform gate stack heights.
Implementation Method 1
a dielectric layer is formed to surround the first dummy gate stack and the second dummy gate stack
Implementation Method 2
an insulating structure is formed within this opening to electrically isolate the metal gate stacks
Data Source
AI summary
A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a first dielectric layer over the substrate. The semiconductor device structure also includes a first metal gate stack and a second metal gate stack over the substrate and the first dielectric layer. The semiconductor device structure further includes a second dielectric layer beside the first metal gate stack and an insulating structure over the substrate. A portion of the insulating structure is between the first metal gate stack and the second metal gate stack. The insulating structure penetrates into the second dielectric layer.