Metal Gate Monolayer Patterning for Low-Leakage FinFETs
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Solution Overview
Problem
In semiconductor manufacturing, particularly during the replacement gate process for FinFET devices, existing methods face challenges in forming an etch protection mechanism and patterning barrier and work function layers without causing damage or leakage, especially when removing silicon caps and processing interfacial dielectric layers.
Innovation Solution
A wet process-assisted approach is implemented to form an etch protection mechanism and pattern selective barrier and work function layers, using self-assembled monolayers (SAMs) and specific etching solutions to protect the semiconductor device structure from damage and leakage, allowing for the selective removal of layers and deposition of tuning layers without a separate hardmask.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional replacement gate process is used to form metal gate stacks, then the gate structure can be formed last, but damage and leakage occur during silicon cap removal and barrier layer patterning
Solution Approach 1:
Self-assembled monolayers (SAMs) are introduced as intermediary protective layers during the replacement gate process. These SAMs form on the silicon cap surface and serve as etch protection mechanisms, preventing direct contact between etchants and the underlying silicon cap, thereby reducing damage and leakage during cap removal and barrier layer patterning operations
Solution Approach 2:
The self-assembled monolayers are formed in advance before etching operations to preemptively protect the silicon cap and underlying structures. This preliminary protective action prevents etchant penetration and associated damage before the harmful etching process begins, addressing the contradiction by preparing anti-damage measures beforehand
2Manufacturing precision
If a separate hardmask is used for barrier and work function layer patterning, then precise patterning can be achieved, but process complexity increases
Solution Approach 1:
The self-assembled monolayers serve dual functions: they act as etch protection mechanisms during silicon cap removal and simultaneously function as hardmasks for barrier and work function layer patterning. This merging of protective and patterning functions into a single SAM layer eliminates the need for separate hardmask deposition and patterning steps, reducing process complexity while maintaining patterning precision
Solution Approach 2:
The self-assembled monolayers exhibit multi-functionality by serving as both etch protection layers and patterning hardmasks throughout the replacement gate process. This universal application of SAMs across multiple critical process steps simplifies the overall manufacturing process while maintaining the precision required for barrier and work function layer patterning
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces damage to the semiconductor device, improves electric behavior, lowers electric leakage, and increases the threshold voltage tuning window by enabling precise control over layer formation and removal, enhancing the overall performance of FinFET devices.
Implementation Method 1
forming a first self-assembled monolayer and a second self-assembled monolayer that serves as an etch protection layer
Implementation Method 2
The second capping layer is removed using a wet etching solution
Data Source
AI summary
Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.