Metal Gate Stack Structure for Reduced EOT and Poly Depletion
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Solution Overview
Problem
MOS devices with polysilicon gate electrodes suffer from the carrier depletion effect, known as poly depletion, which increases the effective gate dielectric thickness and makes it difficult to create an inversion layer at the semiconductor surface, affecting the performance of transistors.
Innovation Solution
The formation of metal gate electrodes with multiple layers, including a high-k dielectric layer and a metal layer that undergoes an annealing process to reduce the interfacial layer thickness and increase channel mobility, replacing the polysilicon gate electrodes to address the poly depletion issue.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polysilicon gate electrodes are used, then the work function can be adjusted to the band-edge of silicon, but the carrier depletion effect increases the effective gate dielectric thickness and makes it difficult to create an inversion layer
Solution Approach 1:
The patent changes the material parameter of the gate electrode from polysilicon to metal (such as tungsten, titanium nitride, or other metallic materials), fundamentally altering the electrical and physical properties to eliminate carrier depletion while maintaining adjustable work function through material selection and doping control
Solution Approach 2:
The patent employs composite gate structures combining multiple materials including metal layers, dielectric layers, and doped regions to achieve both the elimination of poly depletion effect and the ability to adjust work function to match silicon band-edge requirements for both NMOS and PMOS devices
2Reliability
If metal gate electrodes are formed with multiple layers, then the poly depletion effect is eliminated, but the manufacturing process complexity increases
Solution Approach 1:
The patent divides the gate electrode into multiple functional layers including barrier layers, work function control layers, and capping layers, where each layer serves a specific purpose such as preventing diffusion, controlling work function, or providing mechanical protection, allowing independent optimization of each layer's properties
Solution Approach 2:
The patent designs the metal gate structure to simultaneously achieve multiple functions: eliminating poly depletion, controlling work function for both NMOS and PMOS devices, providing thermal stability, and serving as a barrier to diffusion, thereby reducing the need for separate structures for each function
3Productivity
If the gate dielectric thickness is reduced to improve transistor performance, then the inversion layer creation is enhanced, but the gate dielectric becomes more susceptible to defects and reliability issues
Solution Approach 1:
The patent employs composite gate dielectric structures combining high-k dielectric materials with traditional silicon oxide or silicon nitride layers, creating a multi-layer system that provides both the thin effective thickness needed for high-speed operation and the defect tolerance required for reliability through the protective properties of each material layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the Effective Oxide Thickness (EOT) of the gate dielectric, enhances channel mobility, and improves the reliability and thermal stability of the gate dielectric, effectively mitigating the poly depletion effect and improving transistor performance.
Implementation Method 1
a metal layer that undergoes an annealing process to reduce the interfacial layer thickness
Data Source
AI summary
A device includes a semiconductor region, an interfacial layer over the semiconductor region, the interfacial layer including a semiconductor oxide, a high-k dielectric layer over the interfacial layer, and an intermixing layer over the high-k dielectric layer. The intermixing layer includes oxygen, a metal in the high-k dielectric layer, and an additional metal. A work-function layer is over the intermixing layer. A filling-metal region is over the work-function layer.