Metal Gate Process Selective Etching

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Solution Overview

Problem

Conventional poly-silicon gates in semiconductor devices face performance issues due to boron penetration and depletion, leading to increased gate dielectric layer thickness and reduced capacitance, necessitating the use of work function metals for improved performance.

Innovation Solution

A metal gate process that simultaneously removes a metal layer from the top part of one recess and other recesses using a single lithography process, avoiding voids between transistors caused by misaligned photoresists and ensuring complete removal of metal gate material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single lithography process is used to remove metal layer, then manufacturing efficiency is improved, but manufacturing precision may deteriorate due to difficulty in selective removal

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidselective removal precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The metal layer is segmented into different regions (first metal layer in second recess, second metal layer in first recess) with different removal timings. The single lithography process removes only the first metal layer selectively, while the second metal layer remains for subsequent filling, achieving both efficiency and precision

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first metal layer is formed as a preliminary structure that is selectively removed in the single lithography process, preparing the way for subsequent material filling in the first recess while maintaining the metal layer in the second recess

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If multiple lithography processes are used to remove metal layer, then manufacturing precision is improved, but manufacturing complexity increases and voids may form

Engineering Contradiction:
Improvemetal layer removal precisionVSAvoidlithography process steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Multiple lithography operations are merged into a single lithography process that simultaneously achieves selective removal of the first metal layer. This consolidation reduces process complexity and eliminates void formation between transistors that would result from misaligned photoresists in multiple steps

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single lithography process performs multiple functions: it defines the pattern for selective removal, controls the etching boundaries, and prepares the structure for subsequent filling, eliminating the need for separate lithography steps

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If metal layer is not completely removed, then material residue occurs, but complete removal may affect adjacent structures

Engineering Contradiction:
Improvemetal layer removal completenessVSAvoiddamage to adjacent structures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The etching process is applied with local quality control, removing the first metal layer completely in the first recess while preserving the second metal layer in the second recess. The lithography pattern and etching conditions are optimized to achieve complete removal only where needed, preventing residue while protecting adjacent structures

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8753968B2Metal gate process
Publication Date: 2014.06.17 UNITED MICROELECTRONICS CORP
  • US8753968B2 patent drawing
  • US8753968B2 patent drawing
  • US8753968B2 patent drawing

AI summary

A metal gate process includes the following steps. An isolating layer on a substrate is provided, where the isolating layer has a first recess and a second recess. A first metal layer covering the first recess and the second recess is formed. A material is filled in the first recess but exposing a top part of the first recess. The first metal layer in the top part of the first recess and in the second recess is simultaneously removed. The material is removed. A second metal layer and a metal gate layer in the first recess and the second recess are sequentially filled.