Metal Gate Semiconductor Structure with Deep Contact Plug
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Solution Overview
Problem
Conventional semiconductor structures face issues with inferior performance due to boron penetration and depletion effects in poly-silicon gates, and high resistance and electrical shorts between metal gates and contact plugs, leading to decreased device quality.
Innovation Solution
A method for forming a semiconductor structure with a metal connection, where a substrate is provided with a transistor and ILD layers, a contact plug is formed to connect the source/drain region, and openings are created above the gate and contact plug, allowing for deeper filling with metal layers to form connections, avoiding exposure of the gate during planarization and ensuring the contact plug is higher than the gate surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If poly-silicon is used as gate electrode, then device structure is simple, but performance deteriorates due to boron penetration and depletion effect
Solution Approach 1:
The patent changes the material parameter of the gate electrode from poly-silicon to metal (such as tungsten, cobalt, or titanium nitride), fundamentally altering the electrical properties to eliminate boron penetration and depletion effects while maintaining structural simplicity
Solution Approach 2:
The patent employs composite material structures in the gate electrode, using metal layers combined with high-k dielectric materials to achieve both simple structure and high performance, resolving the contradiction between structural simplicity and device reliability
2Reliability
If conventional wiring system with multiple contact plugs is used, then connection pathway is established, but resistance increases and electrical performance deteriorates
Solution Approach 1:
The patent merges the gate electrode and contact plug functions into a single metal structure, eliminating the need for separate contact plugs and reducing the number of interconnect layers, thereby reducing resistance and simplifying the wiring system while improving electrical performance
3Length of moving object
If device miniaturization is implemented, then device size is reduced, but electrical short between gate and contact plug occurs more easily
Solution Approach 1:
The patent transitions from a planar two-dimensional layout to a three-dimensional vertical structure by forming the metal gate electrode to extend above the contact plug level, creating additional vertical separation distance that prevents electrical shorts while maintaining compact horizontal device dimensions
Data Source
AI summary
The present invention provides a method for forming a semiconductor structure having a metal connect. A substrate is provided, and a transistor and a first ILD layer are formed thereon. A first contact plug is formed in the first ILD layer to electrically connect the source/drain region. A second ILD layer and a third ILD layer are formed on the first ILD layer. A first opening above the gate and a second opening above the first contact plug are formed, wherein a depth of the first contact plug is deeper than that of the second opening. Next, the first opening and the second opening are deepened. Lastly, a metal layer is filled into the first opening and the second opening to respectively form a first metal connect and a second metal connect.


