Metal Gate Stack with Silicon Cap for Etch Loading Uniformity

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Solution Overview

Problem

The scaling down of semiconductor devices leads to pronounced loading effects between long and short channel transistors due to differences in metal gate electrode etching, causing performance degradation, lower device yield, and potential failures.

Innovation Solution

A silicon-containing material is formed over the metal gate electrode of long channel transistors, accompanied by a tungsten-containing conductive layer, to ensure uniform etching and reduce resistance, followed by a planarization process to achieve similar heights for both transistor types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If metal gate electrode etching is performed on both long channel and short channel transistors, then transistor fabrication is completed, but loading effects occur causing non-uniform etching and performance degradation

Engineering Contradiction:
Improveuniformity of metal gate electrode etchingVSAvoiddevice yield
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies local quality by forming a silicon-containing material specifically over the metal gate electrode of the long channel transistor, creating a localized modification that addresses the specific etching uniformity issue in that region without affecting other areas of the device

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The silicon-containing material acts as an intermediary layer between the metal gate electrode and the etching process, modifying the etching characteristics locally to achieve uniform etching rates across different transistor types

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If scaling down of semiconductor devices is continued, then production efficiency increases and costs decrease, but loading effects between long and short channel transistors become more pronounced

Engineering Contradiction:
Improveproduction efficiencyVSAvoiduniformity of etching between transistor types
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The silicon-containing material is selectively formed only over the long channel transistor's metal gate electrode, providing localized etching control precisely where needed due to the scaling-induced loading effects

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The silicon-containing material is formed in advance before the metal gate electrode etching process, pre-conditioning the long channel transistor region to compensate for the loading effects that will occur during subsequent etching

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If silicon-containing material is formed over metal gate electrode of long channel transistor, then etching uniformity is improved and loading effects are reduced, but device structure complexity increases

Engineering Contradiction:
Improveuniformity of metal gate electrode etchingVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The solution adds complexity only locally over the long channel transistor's metal gate electrode rather than modifying the entire device structure, minimizing the overall increase in device complexity while achieving the desired etching uniformity

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach alleviates loading effects, enhances electrical performance, and ensures uniformity between long and short channel transistors, improving device yield and reducing resistance.

Implementation Method 1

a silicon-containing material is formed over the metal gate electrode

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Implementation Method 2

accompanied by a tungsten-containing conductive layer, to ensure uniform etching and reduce resistance

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS20250349723A1Forming silicon-containing material over metal gate to reduce loading between long channel and short channel transistors
Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250349723A1 patent drawing
  • US20250349723A1 patent drawing
  • US20250349723A1 patent drawing

AI summary

A semiconductor device includes an active region. A metal gate electrode is disposed over the active region. A conductive layer is disposed over the metal gate electrode. A silicon-containing layer is disposed over a first portion of the conductive layer. A dielectric layer is disposed over a second portion of the conductive layer. A gate via vertically extends through the silicon-containing layer. The gate via is disposed over, and electrically coupled to, the metal gate electrode.