Selective SiN Capping for Metal Gate Oxidation Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Oxygen-plasma species generated during oxide film deposition in semiconductor fabrication processes cause undesirable oxidation of metal gates, leading to degradation of underlying layers and complex S/D contact formation issues.
Innovation Solution
Selective deposition of a SiN capping layer on metal gates using an Atomic Layer Deposition (ALD) process, which delays nucleation on silicon oxide surfaces, preventing oxidation and ensuring smooth S/D contact hole profiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If oxide film deposition is performed using plasma enhanced process, then interlayer dielectric and passivation layers are formed, but oxygen-plasma species cause oxidation of metal gates
Solution Approach 1:
A silicon nitride capping layer is deposited as an intermediary protective layer between the metal gate and the oxide film deposition process. This capping layer acts as a barrier that prevents oxygen-plasma species from reaching and oxidizing the metal gate, while allowing the oxide film deposition to proceed normally on other surfaces
Solution Approach 2:
The silicon nitride capping layer is deposited in advance before the oxide film deposition process. This preliminary protective action ensures that the metal gate is already protected when the potentially harmful plasma process is subsequently applied
2Object-affected harmful factors
If SiN capping layer is selectively deposited on metal gates using ALD process, then oxidation of metal gates is prevented, but selective deposition control is required
Solution Approach 1:
The ALD process parameters are optimized to exploit the difference in nucleation behavior between metal gate surfaces and silicon oxide surfaces. By controlling deposition temperature, precursor flow rates, and cycle timing, selective deposition is achieved on metal gates while minimizing deposition on silicon oxide surfaces
Solution Approach 2:
The ALD process utilizes the inherent surface chemistry differences between metal gates and silicon oxide surfaces to achieve self-selective deposition. The process naturally favors nucleation and growth on metal surfaces due to their higher reactivity with the precursor, reducing the need for complex external control mechanisms
3Reliability
If capping layer is deposited to protect metal gates, then device reliability is improved, but S/D contact formation complexity increases
Solution Approach 1:
The capping layer is selectively deposited only on metal gate surfaces rather than uniformly across all surfaces. This localized approach provides protection where needed while leaving other areas accessible for subsequent processing steps like S/D contact formation
Solution Approach 2:
The ALD process is performed for a limited number of cycles to deposit a thin capping layer that provides sufficient protection during oxide deposition but can be easily removed or penetrated during subsequent S/D contact formation processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents oxidation of metal gates and facilitates reliable S/D contact formation with smooth sidewalls, enhancing device integrity and reliability.
Implementation Method 1
selectively depositing a silicon nitride layer on the metallic surface and not on the silicon oxide layer
Implementation Method 2
a precursor adsorption phase, a first purging phase, a co-reactant adsorption phase, and a second purging phase
Data Source
AI summary
A method for semiconductor fabrication includes forming a metal gate surrounded by a first silicon oxide layer, wherein a metallic surface of the metal gate is exposed. The method further includes selectively depositing a silicon nitride layer on the metallic surface and not on the first silicon oxide layer, and depositing a second silicon oxide layer on the first silicon oxide layer and on the silicon nitride layer.