Metal Gate Stack Segmentation for Semiconductor Reliability
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in forming reliable devices at increasingly smaller sizes, as feature sizes decrease, making fabrication processes more complex and difficult.
Innovation Solution
The process involves forming a semiconductor device structure by creating a dummy gate stack, removing it to form a trench, depositing metal gate stack layers, forming recesses to separate them into multiple gate stacks, and filling these recesses with a dielectric structure to improve the quality and reliability of the metal gate stacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication process complexity and difficulty increase
Solution Approach 1:
The gate structure is segmented into multiple metal layers (first metal layer, second metal layer, third metal layer) with different work functions, allowing independent optimization of threshold voltage and channel control. This segmentation enables complex device behavior to be achieved through simpler, more manufacturable individual layers.
Solution Approach 2:
The patent changes the material parameters of the gate structure by using multiple metals with different work functions (e.g., tungsten for n-type, titanium nitride for interface control). This parameter variation allows precise control of device characteristics while maintaining manufacturing feasibility through standardized deposition processes.
2Quantity of substance
If feature sizes decrease to increase functional density, then geometric scaling benefits are achieved, but manufacturing reliability decreases
Solution Approach 1:
Different metal layers are assigned to different local regions of the gate structure with specific functions: the first metal layer (higher work function) controls the source/drain interface for threshold voltage, the second metal layer provides intermediate control, and the third metal layer (lower work function) controls the channel region. This local quality differentiation ensures reliable device operation at scaled dimensions.
Solution Approach 2:
The gate structure uses a composite of multiple metal materials with complementary properties. The combination of metals with different work functions, conductivities, and thermal stabilities creates a composite gate structure that maintains electrical reliability and mechanical integrity at reduced feature sizes.
3Length of stationary object
If complex fabrication processes are used to achieve smaller features, then geometric scaling is achieved, but process difficulty increases
Solution Approach 1:
The gate dielectric layer is formed with a preliminary graded structure (first region with first dielectric constant, second region with second dielectric constant) before metal deposition. This preliminary action simplifies subsequent processing by pre-establishing the electrical characteristics needed for threshold voltage control, reducing the need for complex post-processing steps.
Solution Approach 2:
The multi-layer metal gate structure serves multiple functions simultaneously: it provides threshold voltage control, channel electrostatic control, and interface quality management. This multi-functionality consolidates what would otherwise require separate structures or process steps, simplifying the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the deposition and reliability of metal gate stacks, reduces issues like short circuits and current leakage, and allows for precise control of size and position, thereby simplifying the manufacturing process and improving device performance.
Implementation Method 1
Metal gate stack layers are formed in the trench
Implementation Method 2
Metal gate stack layers are formed in the trench
Implementation Method 3
A dielectric structure is then formed in the recesses to electrically isolate the metal gate stacks
Data Source
AI summary
A structure and a formation method of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure also includes a dielectric structure over the semiconductor substrate and adjacent to the gate stack. The dielectric structure is in direct contact with the work function layer and the metal filling.