High-Voltage Metal Gate Structure to Avoid STI Corner Charge Trapping
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Solution Overview
Problem
High-voltage OLED devices experience instability due to increased on-resistance and decreased current density over time, primarily caused by hole trapping at Shallow Trench Isolation (STI) corners, leading to a decrease in luminous efficiency and reliability issues when operating at high gate and drain voltages.
Innovation Solution
A high-voltage metal gate device process method that forms a polysilicon gate in the shallow trench isolation region, using a refractory silicide layer to control the voltage and maintain current away from the Si/SiO2 interface, thereby enhancing the reliability and stability of the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high voltage is applied to the gate and drain ends to increase current density, then the device current density increases, but the STI corner is prone to capture holes and trap electrons, causing increased on-resistance and device instability
Solution Approach 1:
The patent applies preliminary action by forming a lightly-doped drain extension region before the main drain region, and by pre-configuring the gate structure with specific doping profiles. This preliminary structuring prevents hot carrier injection and charge trapping at the STI corner before high voltage operation begins, thereby maintaining device stability while enabling high current density operation.
Solution Approach 2:
The patent implements local quality by creating regions with different doping concentrations and structural properties at specific locations. The lightly-doped drain extension region has different electrical characteristics than the main drain region, and the gate structure has spatially varying doping profiles. This local differentiation allows the device to handle high voltages without causing charge trapping at critical STI corners.
2Reliability
If thick silicon gate oxide is grown to support high voltage operation, then high voltage capability is achieved, but it influences the subsequent process of metal gate formation
Solution Approach 1:
The patent applies parameter changes by adjusting the gate oxide thickness to an optimized value that balances high voltage capability with metal gate process compatibility. Rather than using uniformly thick oxide, the invention employs spatially varying oxide thickness and doping concentrations to achieve the necessary voltage support while maintaining process compatibility for subsequent metal gate formation.
3Reliability
If the active area is recessed to grow thick silicon oxide, then high voltage operation is enabled, but the device structure becomes more complex
Solution Approach 1:
The patent implements segmentation by dividing the drain region into multiple zones: a lightly-doped drain extension region and a main drain region. This segmentation allows each region to be optimized independently for its specific function, achieving high voltage capability without requiring uniform structural modifications throughout the entire device, thereby reducing overall structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the reliability and stability of high-voltage devices by maintaining on-current away from the Si/SiO2 interface, addressing the issues of increased on-resistance and decreased current density, and ensuring consistent performance during both initial and long-term operations.
Implementation Method 1
maintain current away from the Si/SiO2 interface
Implementation Method 2
the STI corner below the gate is prone to capture holes from the channel during the initial operation
Implementation Method 3
the STI corner close to the drain is prone to trap electrons, resulting in a decrease in the corresponding current
Implementation Method 4
This effect is mainly caused by collisional ionization and vertical electric field distribution, when the current is close to the Si/SiO2 interface under the high gate and drain voltages
Data Source
AI summary
This application discloses a process method for a high-voltage metal gate device. The method includes: forming a first STI region on a substrate; etching the first STI region to form a first groove; covering the first groove with a gate oxide layer and a high-k dielectric layer; depositing a polysilicon layer to fill the first groove; depositing a silicon nitride hard mask and a silicon oxide hard mask on the polysilicon layer in the first groove to form a second groove, removing the silicon oxide hard mask; implanting a high-voltage area P-type source and drain; forming an interlayer dielectric layer to cover an auxiliary gate region including the second groove; and forming contact holes to connect to the refractory silicide through the interlayer dielectric layer.