Metal Gate Stress Modulation via Ion Implantation

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Solution Overview

Problem

Current semiconductor fabrication processes face challenges in replacing polysilicon gate electrodes with metal gates while maintaining device performance, particularly in generating tensile stress in NMOS transistor channels to meet performance requirements.

Innovation Solution

A method involving the formation of a metal gate structure through a 'gate last' process, where a sacrificial polysilicon gate is replaced with a metal gate, and a stress modulation process using ion implantation is applied to alter the stress properties of the metal gate layers, introducing compressive stress to enhance tensile stress in the channel region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If polysilicon gate electrodes are used, then thermal resistive properties and self aligned source/drain structure formation are achieved, but device performance requirements cannot be met

Engineering Contradiction:
Improvedevice performanceVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the material parameter from polysilicon to metal gate electrode, fundamentally altering the electrical and thermal properties of the gate structure. This material substitution enables meeting performance requirements while maintaining compatibility with existing fabrication processes through the gate last methodology

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies preliminary stress modulation through ion implantation into the metal gate electrode before final device operation. This pre-applied stress is designed to compensate for thermal effects during subsequent processing and operation, ensuring optimal device performance is achieved

Inventive Principle:
Principle #10Preliminary action

2Reliability

If metal gate electrodes are implemented, then device performance can be improved, but tensile stress generation in NMOS transistor channels becomes challenging

Engineering Contradiction:
ImproveNMOS transistor performanceVSAvoidstress control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the metal gate electrode as an intermediary stress application mechanism. By implanting ions into the metal gate, compressive stress is generated in the gate layer, which then transfers tensile stress to the underlying channel region, effectively boosting NMOS performance without requiring direct stress application to the channel

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the stress parameter of the metal gate electrode through ion implantation, changing its mechanical properties from a neutral or tensile state to a compressive state. This parameter change enables the metal gate to serve as an effective stressor for the channel region

Inventive Principle:
Principle #35Parameter changes

3Reliability

If gate last methodology is used, then replacement of polysilicon with metal gate is achieved, but material loss during etching occurs

Engineering Contradiction:
Improvemetal gate structure formationVSAvoidmaterial loss
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent applies preliminary ion implantation to the metal gate electrode before etching operations. This pre-treatment modifies the material properties of the metal gate, making it more resistant to subsequent etching processes and reducing material loss while maintaining the integrity of the gate structure

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the process, improves device performance by boosting NMOS transistor performance through controlled stress modulation, and reduces material loss during etching.

Implementation Method 1

a stress modulation process using ion implantation is applied to alter the stress properties of the metal gate layers

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

introducing compressive stress to enhance tensile stress in the channel region

Methodology Applied
Scientific EffectStress modulation:

Data Source

PatentUS8530294B2Stress modulation for metal gate semiconductor device
Publication Date: 2013.09.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8530294B2 patent drawing
  • US8530294B2 patent drawing
  • US8530294B2 patent drawing

AI summary

The present disclosure provides a method of semiconductor device fabrication including removing a sacrificial gate structure formed on a substrate to provide an opening. A metal gate structure is then formed in the opening. The forming of the metal gate structure includes forming a first layer (including metal) on a gate dielectric layer, wherein the first layer includes a metal and performing a stress modulation process on the first layer. The stress modulation process may include ion implantation of a neutral species such as silicon, argon, germanium, and xenon.