Metal Gate Top Barrier Layer for Diffusion Control
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Solution Overview
Problem
Conventional semiconductor devices with poly-silicon gates face performance issues due to boron penetration and depletion effects, leading to reduced gate capacitance and driving force, particularly in scaled-down devices, necessitating the use of work function metals with complex dual gate processes that require precise thickness and composition control.
Innovation Solution
A semiconductor device with a top barrier layer incorporating a boundary protection material, such as oxygen or nitrogen, is formed on a substrate with a gate dielectric and work function metal layer, where the concentration of the boundary protection material is higher far from the substrate, enhancing the barrier function and preventing metal layer diffusion or spiking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If poly-silicon is used as gate electrode, then manufacturing process is simple, but device performance deteriorates due to boron penetration and depletion effect
Solution Approach 1:
The patent changes the material parameter of the gate electrode from poly-silicon to metal gate (such as tungsten, titanium nitride, or other work function metals). This material substitution eliminates boron penetration and depletion effects while maintaining manufacturing feasibility through established metal deposition techniques like CVD or PVD.
Solution Approach 2:
The patent employs a composite gate structure consisting of multiple metal layers with different work functions. This composite metal gate structure allows optimization of both NMOS and PMOS device characteristics by selecting appropriate metal combinations, thereby improving overall device performance without sacrificing manufacturability.
2Manufacturing precision
If dual metal gate method is used, then work function control is improved, but process complexity increases
Solution Approach 1:
The patent applies different metal materials to different regions of the gate structure to achieve local work function optimization. Specifically, different metal layers or compositions are used for NMOS and PMOS gates, allowing precise work function control tailored to each device type while managing process complexity through selective application.
Solution Approach 2:
The gate electrode is segmented into multiple metal layers, each with specific work function characteristics. This segmentation allows independent optimization of work function for different device types (NMOS/PMOS) and enables precise electrical characteristic control through material composition and thickness adjustment of individual layers.
3Ease of manufacture
If metal gate is formed without top barrier layer, then manufacturing process is simple, but metal layer diffusion and spiking occur
Solution Approach 1:
The patent introduces a top barrier layer as an intermediary between the metal gate and the gate dielectric. This barrier layer (such as titanium nitride, tantalum nitride, or other diffusion barrier materials) prevents metal atom diffusion and spiking into the dielectric while maintaining electrical functionality, thereby improving metal layer stability without significantly complicating the fabrication process.
Solution Approach 2:
The patent extracts the barrier function from the metal gate structure itself and places it in a separate dedicated top barrier layer. This separation allows the metal gate to focus on providing work function control while the top barrier layer specifically handles diffusion and spiking prevention, improving overall reliability with minimal impact on manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The top barrier layer with increased boundary protection material improves the barrier function, preventing metal layer diffusion and spiking, thereby enhancing the performance and reliability of the semiconductor device by maintaining optimal work function and reducing manufacturing complexity.
Implementation Method 1
the top barrier layer includes a boundary protection material in which a concentration thereof near the substrate is substantially less than that far from the substrate
Data Source
AI summary
The present invention provides a method of forming a semiconductor device having a metal gate. A substrate is provided and a gate dielectric and a work function metal layer are formed thereon, wherein the work function metal layer is on the gate dielectric layer. Then, a top barrier layer is formed on the work function metal layer. The step of forming the top barrier layer includes increasing a concentration of a boundary protection material in the top barrier layer. Lastly, a metal layer is formed on the top barrier layer. The present invention further provides a semiconductor device having a metal gate.