Metal Gate Transistor Fabrication Using Etching Stop Layer
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Solution Overview
Problem
Polysilicon gate electrodes in semiconductor transistors have high resistance, leading to lower performance and a depletion effect due to limited doping concentration, which results in a thicker gate dielectric layer and reduced capacitance, and the conventional method of replacing polysilicon with metal gates damages the gate insulating layer, extending fabrication time and disrupting dopant distribution.
Innovation Solution
A method for fabricating metal gate transistors involving a substrate with a gate insulating layer, a stacked film with an etching stop layer, polysilicon, and a hard mask, followed by patterning and removal of the polysilicon layer to form a conductive layer without damaging the gate insulating layer, using a silicon nitride etching stop layer to protect it during polysilicon removal and eliminating the need for additional thermal oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If polysilicon material is used to fabricate gate electrodes, then the gate has strong resistance for heat, but the gate works under a much lower rate due to high resistance
Solution Approach 1:
The patent changes the material parameter of the gate electrode from polysilicon to metal (such as tungsten, cobalt, or copper), fundamentally altering the electrical resistance characteristic while maintaining the gate's structural and thermal functions. This material substitution resolves the contradiction by providing both heat resistance and high operation rate.
2Manufacturing precision
If polysilicon gate electrode is used with limited doping concentration, then the gate structure is formed, but a depletion region is created at the interface with gate dielectric layer, thickening the effective gate dielectric and reducing capacitance
Solution Approach 1:
The patent changes the doping concentration parameter from the limited range of polysilicon (2×10^20 to 3×10^20/cm³) to much higher concentrations achievable with metal gates and silicide formation, eliminating the depletion region effect and restoring full gate control and capacitance.
Solution Approach 2:
The patent employs composite material structures including metal gates combined with silicide layers (such as tungsten silicide, cobalt silicide) to achieve both the electrical performance needed to eliminate depletion effects and the thermal stability required for reliable operation.
3Productivity
If conventional method is used to replace polysilicon with metal gate by removing polysilicon through dry or wet etching, then metal gate is formed, but the gate insulating layer is damaged requiring additional thermal oxidation
Solution Approach 1:
The patent performs preliminary protective actions by forming a protective layer (such as silicon nitride or silicon oxide) over the gate insulating layer before metal deposition, preventing damage during subsequent processing steps and eliminating the need for corrective thermal oxidation.
Solution Approach 2:
The patent introduces an intermediary protective layer between the gate insulating layer and the metal gate structure, which acts as a buffer during fabrication processes, preventing direct damage to the insulating layer and eliminating the need for additional repair steps.
4Productivity
If conventional method is used to remove polysilicon from dummy gate, then metal gate is formed, but dopant distribution in lightly doped drain or source/drain region is disrupted
Solution Approach 1:
The patent uses an intermediary protective layer that extends over the drain and source regions during the metal gate formation process, shielding the dopant distribution from disruption while allowing the metal gate to be properly formed in the channel region.
Solution Approach 2:
The patent segments the protective layer to provide differential protection - covering the drain and source regions to protect dopant distribution while leaving the channel region exposed for proper metal gate formation, thus resolving the conflicting requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces fabrication time and cost by protecting the gate insulating layer and maintaining dopant distribution, enhancing the performance of metal gate transistors by avoiding damage to the gate insulating layer and improving the driving ability of the device.
Implementation Method 1
removing the polysilicon layer of the dummy gate; removing the etching stop layer of the dummy gate for forming an opening
Data Source
AI summary
A method for fabricating metal gate transistor is disclosed. The method includes the steps of: providing a substrate, wherein the substrate comprises a transistor region defined thereon; forming a gate insulating layer on the substrate; forming a stacked film on the gate insulating layer, wherein the stacked film comprises at least one etching stop layer, a polysilicon layer, and a hard mask; patterning the gate insulating layer and the stacked film for forming a dummy gate on the substrate; forming a dielectric layer on the dummy gate; performing a planarizing process for partially removing the dielectric layer until reaching the top of the dummy gate; removing the polysilicon layer of the dummy gate; removing the etching stop layer of the dummy gate for forming an opening; and forming a conductive layer in the opening for forming a gate.