Metal Gate Semiconductor Device Void-Free Filling
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Solution Overview
Problem
In the 'gate last' process for semiconductor device fabrication, voids often form when depositing metal into shrinking trenches, leading to increased resistance and potential performance degradation due to incomplete filling and high aspect ratios.
Innovation Solution
A method involving the formation of a photoresist layer to protect the metal layer within the trench, followed by an etch back process to remove unprotected metal portions, allowing a subsequent metal filler layer to completely fill the trench, thereby reducing void formation and maintaining precise gate height control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If metal film is deposited into shrinking trenches to form metal gate electrode, then device performance is improved with decreased feature sizes, but voids form due to high aspect ratios and incomplete filling
Solution Approach 1:
The metal gate electrode formation is divided into multiple deposition steps with different materials (first metal layer, second metal layer, filler metal layer) rather than attempting to fill the trench with a single metal deposition process. This segmentation allows each layer to serve specific functions and ensures complete trench filling without voids.
Solution Approach 2:
A protection layer is formed in the remaining portion of the trench before depositing the first metal layer. This preliminary action prevents metal deposition in certain areas, controlling the filling process and preventing void formation by managing the high aspect ratio trench filling in stages.
2Productivity
If gate length is decreased to improve device performance, then transistor scaling is achieved, but trench size decreases making metal deposition increasingly difficult and prone to void formation
Solution Approach 1:
The manufacturing process is segmented into multiple controlled deposition and removal steps, making the complex task of filling high aspect ratio trenches manageable. Each step is optimized for specific conditions, reducing the overall difficulty despite shrinking dimensions.
Solution Approach 2:
The invention changes the parameters of the deposition process by using multiple metal layers with different properties and controlling deposition conditions at each stage. This allows adaptation to the changing trench dimensions as gate length decreases, maintaining ease of manufacture despite scaling.
3Manufacturing precision
If photoresist etch back process is used to protect metal layer in trench, then void formation is minimized and gate height control is maintained, but process complexity increases
Solution Approach 1:
A photoresist layer is introduced as an intermediary material to protect the metal layer during etch back processes. This intermediary enables precise gate height control by selectively protecting areas that should retain metal, justifying the increased process complexity through improved manufacturing precision.
Solution Approach 2:
The photoresist layer is applied in advance before critical etch back steps, establishing a protection pattern that guides subsequent processing. This preliminary action ensures that metal height is controlled accurately while preventing void formation, making the additional process steps necessary and worthwhile.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes or eliminates voids in the metal gate structure, enhancing device performance and reliability, especially in advanced technology nodes with smaller features, without overpolishing, which could degrade transistor stress and performance.
Implementation Method 1
forming a photoresist layer on the first metal layer to fill a remainder of the trench, etching back the photoresist layer such that a portion of the photoresist layer protects the metal layer within the trench
Implementation Method 2
removing an unprotected portion of the first metal layer
Implementation Method 3
depositing a first metal layer over the substrate to partially fill the trench
Implementation Method 4
depositing a second metal layer over the substrate to fill the trench
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a source and a drain region formed on the semiconductor substrate, and a gate structure disposed on the substrate between the source and drain regions. The gate structure includes an interfacial layer formed over the substrate, a high-k dielectric formed over the interfacial layer, and a metal gate formed over the high-k dielectric that includes a first metal layer and a second metal layer, where the first metal layer is formed on a portion of the sidewalls of the gate structure and where the second metal layer is formed on another portion of the sidewalls of the gate structure.