Metal Gate Silicide Doping for Thin-Layer Vt Tuning
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Solution Overview
Problem
The challenge of effectively tuning the threshold voltage (Vt) for both NMOS and PMOS transistors in small-scale CMOS devices, such as FinFET and GAA devices, is exacerbated by the limited space for traditional thick work function metals, making it difficult to achieve proper Vt values while reducing power consumption.
Innovation Solution
A thin work function metal layer is doped with silicon to create a silicide layer, which upon annealing, allows silicon elements to accumulate at the interface with the high-k gate dielectric, generating a dipole effect that reduces the effective work function, enabling precise Vt tuning without increasing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional thick work function metals are used for Vt tuning, then Vt control is achieved, but device dimensions become too large for small-scale devices
Solution Approach 1:
The patent changes the physical and chemical parameters of the work function metal layer by doping it with silicon. This doping modifies the electronic structure and work function of the metal, enabling effective Vt tuning with a much thinner layer (1-3 nm) compared to traditional thick work function metals. The silicon doping concentration and distribution are controlled to achieve the desired work function adjustment while maintaining thin dimensions.
Solution Approach 2:
The patent creates a composite structure by combining work function metal with silicon dopant atoms. This composite material approach forms a silicide-doped metal layer that integrates the beneficial properties of both materials: the metallic conductivity and work function characteristics from the base metal, and the doping-induced work function modulation from silicon. This composite enables effective Vt control in thin-film configurations.
2Productivity
If device dimensions are reduced for scaling, then production efficiency improves and costs decrease, but Vt tuning capability deteriorates
Solution Approach 1:
The patent modifies the work function metal layer's parameters through silicon doping, changing its electronic properties and work function. This enables effective Vt tuning even in the reduced dimensions of scaled devices, maintaining manufacturing precision despite smaller feature sizes. The doping concentration and depth are precisely controlled to achieve the required Vt adjustment in miniaturized devices.
Solution Approach 2:
The patent applies silicon doping locally to the work function metal layer, creating a non-uniform dopant distribution that is concentrated at the interface with the high-k dielectric. This local quality enhancement provides the necessary Vt tuning capability specifically where needed (at the gate-dielectric interface) without requiring overall device enlargement, thus maintaining scaling benefits while achieving precise Vt control.
3Volume of moving object
If work function metal thickness is reduced for small-scale devices, then device scaling is achieved, but Vt tuning range is limited
Solution Approach 1:
The patent changes the fundamental parameters of the work function metal by introducing silicon doping, which modifies the density of states, Fermi level position, and overall work function. This parameter transformation enables a wide Vt tuning range (e.g., 0.5V to 1.5V adjustment) even with thin metal layers (1-3 nm), overcoming the limitation of reduced thickness. The silicon concentration can be varied to achieve different work function values and corresponding Vt settings.
Solution Approach 2:
The patent utilizes the ability to vary silicon doping concentration as a controllable parameter to adjust work function. By changing the silicon content from low to high concentrations, or by controlling the doping depth and distribution, a continuous range of work function values can be achieved, providing versatile Vt tuning capability in thin-film gate structures for different device requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces the effective work function by up to 550 mV, allowing for flexible Vt tuning suitable for small-scale devices, while maintaining manufacturing efficiency and cost-effectiveness.
Implementation Method 1
annealing the structure such that a first portion of the work function metal layer that interfaces with the high-k gate dielectric layer is doped with silicon elements from the silicide layer
Implementation Method 2
removing the silicide layer
Data Source
AI summary
A semiconductor structure includes a substrate and a semiconductor channel layer over the substrate. The semiconductor structure includes a high-k gate dielectric layer over the semiconductor channel layer, a work function metal layer over the high-k gate dielectric layer, and a bulk metal layer over the work function metal layer. The work function metal layer includes a first portion and a second portion over the first portion. Both the first portion and the second portion are conductive. Materials included in the second portion are also included in the first portion. The first portion is doped with silicon at a first dopant concentration, and the second portion is not doped with silicon or is doped with silicon at a second dopant concentration lower than the first dopant concentration.


