Metal Gate Work Function Tuning for Threshold Voltage Control
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Solution Overview
Problem
Conventional poly-silicon gates in semiconductor devices face performance issues due to boron penetration and depletion effects, leading to reduced gate capacitance and driving force, necessitating the use of work function metals for improved control electrodes.
Innovation Solution
The process forms metal gates with different threshold voltages by creating distinct work function layers on a common substrate, where different work function layers are sequentially deposited on a substrate with specific areas, allowing for tailored work function values for various transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional poly-silicon gates are used in semiconductor devices, then the gate structure is simple and easy to manufacture, but performance deteriorates due to boron penetration and depletion effects, leading to reduced gate capacitance and driving force
Solution Approach 1:
The patent employs composite gate structures combining high-k dielectric materials (such as HfO2, Al2O3, Ta2O5) with metal work function layers (such as TiN, TaN, WN) to replace conventional poly-silicon gates. This composite approach simultaneously achieves improved gate performance through high dielectric constant and controllable work function while maintaining manufacturing feasibility through established deposition processes
Solution Approach 2:
The patent controls the gate performance by precisely adjusting the work function of the metal layer through parameter changes including material composition selection, layer thickness control (typically 5-50 nm), and doping concentration adjustment. This enables tuning of threshold voltage and gate capacitance to optimize device performance
2Adaptability or versatility
If a single work function layer is used for metal gates, then the gate structure is simple, but it cannot address the substrate effect and form metal gates with different threshold voltages for different transistor types
Solution Approach 1:
The patent applies different work function metal layers or different thicknesses of work function layers in different regional areas corresponding to NMOS and PMOS transistors. For example, TiN layer with specific thickness is applied in NMOS regions while TaN layer is applied in PMOS regions, enabling local optimization of threshold voltages to address substrate effects and improve device performance
Solution Approach 2:
The gate structure is segmented into multiple functional layers: a bottom high-k dielectric layer and a top metal work function layer, with the metal layer further segmented into different materials or thicknesses for different transistor types. This segmentation allows independent optimization of each layer's properties to achieve desired threshold voltages for different device regions
Data Source
AI summary
A semiconductor process of forming metal gates with different threshold voltages includes the following steps. A substrate having a first area and a second area is provided. A dielectric layer and a first work function layer are sequentially formed on the substrate of the first area and the second area. A second work function layer is directly formed on the first work function layer of the first area. A third work function layer is directly formed on the first work function layer of the second area, where the third work function layer is different from the second work function layer. The present invention also provides a semiconductor structure formed by said semiconductor process.