Metal Impurity Gate Stack Workfunction Tuning
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Solution Overview
Problem
Silicon metal oxide semiconductor field effect transistors (MOSFETs) with high k gate dielectrics, such as HfO2 and TiN/polySi gate stacks, suffer from non-ideal threshold voltage issues, particularly in n-MOSFETs, where the threshold voltage ranges from 0.45 to 0.7 V, which is not ideal for long channel nFETs, aiming for a range of 0 to 0.2 V.
Innovation Solution
Introducing at least one metal impurity into a metal-containing material layer within the gate stack of semiconductor structures, specifically using a metal impurity containing layer above a high k dielectric, like Hf-based dielectrics, to alter the workfunction and stabilize threshold voltages, which can be achieved through codeposition, sequential layer formation, or thermal introduction of impurities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a high k dielectric material (such as HfO2) is used as the gate dielectric, then the dielectric constant is improved (greater than 4.0, preferably greater than 7.0), but the threshold voltage becomes non-ideal (0.45 to 0.7 V range instead of 0 to 0.2 V)
Solution Approach 1:
The patent changes the chemical composition parameter of the metal-containing material layer by introducing metal impurities (such as Ti, W, Mo, Ta, Nb, or their combinations) to alter the workfunction of the gate electrode stack. This parameter change enables precise control of the threshold voltage while maintaining the high dielectric constant of the gate dielectric layer.
Solution Approach 2:
The patent creates a composite gate structure consisting of multiple layers: a high k dielectric layer (such as HfO2, HfSiOx, or HfSiON) combined with a metal-containing material layer (such as TiN, TaN, WN, or MoN) that includes metal impurities. This composite structure achieves both high dielectric constant and ideal threshold voltage characteristics.
2Ease of manufacture
If standard thermal treatments are applied to MOSFETs with HfO2 dielectric and TiN/polySi gate stack, then the fabrication process is simplified, but the threshold voltage remains non-ideal (0.45 to 0.7 V range)
Solution Approach 1:
The patent incorporates metal impurities into the metal-containing material layer during the deposition process or through preliminary thermal treatments before final device formation. This preliminary introduction of impurities ensures the correct workfunction is established early in the fabrication process, preventing threshold voltage issues rather than correcting them later.
Solution Approach 2:
The patent modifies the compositional parameter of the metal-containing material layer by controlling the concentration and type of metal impurities (such as Ti, W, Mo, Ta, Nb) to achieve the desired workfunction. This parameter control allows standard thermal treatments to produce ideal threshold voltages while maintaining fabrication simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively shifts the threshold voltage to the desired range, improving the performance of semiconductor devices by stabilizing flatband and threshold voltages in semiconductor structures with high k gate dielectric materials.
Implementation Method 1
the workfunction of a conductive electrode stack is changed by introducing at least one metal impurity to a metal-containing material layer
Data Source
AI summary
Semiconductor structures, such as, for example, field effect transistors (FETs) and/or metal-oxide-semiconductor capacitor (MOSCAPs), are provided in which the workfunction of a conductive electrode stack is changed by introducing metal impurities into a metal-containing material layer which, together with a conductive electrode, is present in the electrode stack. The choice of metal impurities depends on whether the electrode is to have an n-type workfunction or a p-type workfunction. The present invention also provides a method of fabricating such semiconductor structures. The introduction of metal impurities can be achieved by codeposition of a layer containing both a metal-containing material and workfunction altering metal impurities, forming a stack in which a layer of metal impurities is present between layers of a metal-containing material, or by forming a material layer including the metal impurities above and/or below a metal-containing material and then heating the structure so that the metal impurities are introduced into the metal-containing material.