Metal Interconnect Grain-Boundary Inhibition to Reduce Air Voids
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing the formation of air voids in electrical connection structures during the manufacturing of semiconductor devices, which can increase resistance and reduce the reliability of the devices.
Innovation Solution
A method involving the formation of a first metal material in an opening of a dielectric layer, followed by annealing to promote grain growth, and then forming a second metal material with a different oxidation/reduction potential to create an inhibition layer along the grain boundaries of the first metal material, which inhibits further grain growth and reduces the likelihood and size of air voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If annealing is performed to promote grain growth in the first metal material, then the electrical conductivity is improved, but air voids form on the sidewalls reducing reliability
Solution Approach 1:
A second metal material with different oxidation/reduction potential is introduced as an intermediary substance between the first metal material and the environment. This intermediary forms an inhibition layer along grain boundaries that mediates the grain growth process, preventing excessive grain growth that would create air voids while still allowing controlled grain growth for electrical conductivity improvement.
Solution Approach 2:
The oxidation/reduction potential parameter is changed by selecting a second metal material with different oxidation/reduction potential than the first metal material. This parameter change creates a chemical environment that inhibits further grain growth after annealing, thereby preventing air void formation on sidewalls while maintaining the benefits of controlled grain growth.
2Reliability
If grain growth is promoted through annealing, then electrical conductivity increases, but resistance increases due to air void formation
Solution Approach 1:
The second metal material acts as a chemical intermediary that forms an inhibition layer during or after annealing. This intermediary layer controls the grain growth process by blocking grain boundary migration, thereby preventing the formation of air voids that would increase electrical resistance while still allowing the desired grain growth for conductivity improvement.
Solution Approach 2:
By changing the oxidation/reduction potential parameter through the selection of appropriate second metal materials, the grain growth process is chemically controlled. This parameter change creates a self-regulating mechanism where grain growth occurs to improve conductivity but is automatically inhibited before air voids can form and increase resistance.
3Strength
If the first metal material is deposited to fill the opening, then electrical connection is established, but peeling occurs during planarization
Solution Approach 1:
A composite structure is created by combining the first metal material with the second metal material that has different oxidation/reduction potential. This composite material system provides both the electrical connectivity of the first metal and the adhesion stability of the second metal, preventing peeling during planarization while maintaining electrical connection.
Solution Approach 2:
The oxidation/reduction potential parameter is utilized to create a chemically stable composite structure. The second metal material's different oxidation/reduction potential creates a thermodynamically stable interface that resists peeling forces during planarization, while the overall composite structure maintains the electrical connection function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the formation of air voids on the sidewalls of electrical connection structures, enhancing the reliability and performance of semiconductor devices by minimizing resistance and preventing peeling issues during planarization.
Implementation Method 1
annealing to promote grain growth
Implementation Method 2
forming a second metal material with a different oxidation/reduction potential to create an inhibition layer along the grain boundaries
Data Source
AI summary
A semiconductor device structure is provided. The semiconductor device structure includes a transistor, a conductive feature on the transistor, a dielectric layer over the conductive feature, and an electrical connection structure in the dielectric layer and on the conductive feature. The electrical connection structure includes a first grain of a first metal material and a first inhibition layer extending along a grain boundary of the first grain of the first metal material, the first inhibition layer is made of a second metal material, and the first metal material and the second metal material have different oxidation/reduction potentials.