Metal Interlayer Via Void Suppression via Bottom-Up Plating
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Solution Overview
Problem
The increasing depth-to-width ratio of interconnection features in semiconductor manufacturing makes it difficult to fill metal interconnections without forming voids, leading to device failures, as existing methods struggle with seed layer coverage and neck blocking effects.
Innovation Solution
A method where a seed layer is formed on the dielectric and metal layers before plating, allowing the second metal layer to grow from the bottom upward, eliminating the need for seed layer coverage on side walls and enabling the use of insulating barrier layers for improved filling and reduced void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the seed layer is formed to cover the side walls of the trench before plating, then the seed layer provides continuous coverage for plating, but the neck blocking effect occurs at the sharp corner causing voids in the filled metal layer
Solution Approach 1:
Instead of forming the seed layer first and then plating (conventional approach), the patent inverts the sequence by performing plating first on the exposed bottom surface, then forming the seed layer to cover the side walls and connect to the plated metal. This inversion eliminates the neck blocking effect because the plating starts from the bottom without obstruction from the seed layer corner coverage.
Solution Approach 2:
The patent applies preliminary action by exposing the bottom surface of the trench before plating, ensuring that the plating process starts from a clean, accessible surface. This preliminary preparation of the bottom surface allows uniform metal filling without the interference of seed layer material at the corners, preventing void formation.
2Length of moving object
If the depth-to-width ratio of interconnection features increases, then the device size decreases as required, but the filling difficulty increases and voids are more likely to form
Solution Approach 1:
The patent inverts the conventional sequence by plating before forming the seed layer. This inversion is particularly effective for high depth-to-width ratio trenches because it allows the plating process to start from the bottom surface where metal can deposit uniformly without being blocked by seed layer material at the corners, thereby preventing voids even in deep, narrow features.
Solution Approach 2:
The patent changes the process parameters by modifying the sequence of operations (plating before seed layer formation) and the exposure configuration (exposing bottom surface). These parameter changes enable successful filling of high aspect ratio trenches by eliminating the neck blocking effect that would otherwise prevent uniform metal deposition in deep, narrow features.
3Reliability
If the sharp corner at the trench opening is covered by seed layer, then the seed layer provides complete coverage, but the metal layer filling is blocked and voids are formed
Solution Approach 1:
The patent inverts the conventional process sequence by performing plating before forming the seed layer. This inversion resolves the contradiction by allowing the metal layer to be deposited first on the exposed bottom surface without obstruction, and then the seed layer is formed to cover the side walls and connect to the plated metal, providing both complete coverage and void-free filling.
Solution Approach 2:
The patent applies preliminary action by exposing the bottom surface of the trench before plating, ensuring that the plating process starts from a clean, accessible surface. This preliminary preparation allows uniform metal filling from the bottom up, and the subsequent seed layer formation provides complete coverage without causing voids, as the plating is already complete.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the occurrence of voids and disconnections in metal interconnections by ensuring uniform filling and enhanced barrier layer selection, improving the reliability of semiconductor interconnection structures.
Implementation Method 1
growing a second metal layer by plating using the exposed seed layer
Data Source
AI summary
There is provided a method for forming a metal interlayer via, comprising: forming a seed layer on a first dielectric layer and a first metal layer embedded in the first dielectric layer; forming a mask pattern on the seed layer to expose a portion of the seed layer covering some of the first metal layer; growing a second metal layer on the exposed portion of the seed layer; removing the mask pattern and a portion of the seed layer carrying the mask pattern to expose side walls of the second metal layer, a portion of the first metal layer and the first dielectric layer; forming an insulating barrier layer on the side walls, the portion of the first metal layer and the first dielectric layer. There is also provided a method for forming a metal interconnection line. Both of them can suppress the occurrence of voids. There is further provided a metal interconnection structure comprising a contact plug, a via and a metal interconnection line, wherein the via is formed on the metal interconnection line, the metal gate and/or the contact plug.