Metal Inverse Opal Thermal Stress Compensation Bonding
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Solution Overview
Problem
Traditional bonding techniques for semiconductor devices to metal substrates in power electronics fail to adequately compensate for thermal stress caused by coefficient of thermal expansion mismatch, leading to delamination issues at high operating temperatures.
Innovation Solution
A thermal stress compensation layer comprising a metal inverse opal (MIO) layer with hollow spheres and predefined porosity, along with pairs of bonding layers with specific melting points, is introduced between the semiconductor device and metal substrate to mitigate thermal stresses during transient liquid phase sintering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bonding techniques are used to bond semiconductor devices to metal substrates, then bonding can be achieved at lower temperatures, but thermal stress compensation is insufficient leading to delamination at high operating temperatures
Solution Approach 1:
The patent changes the physical and chemical parameters of the bonding layer by incorporating MIO particles with specific size distributions (0.5-5 micrometers) and controlled volume fractions (10-50%). This modifies the bonding layer's thermal expansion properties to match between the semiconductor device and metal substrate, enabling reliable bonding at high operating temperatures up to 200°C without delamination
Solution Approach 2:
The patent creates a composite bonding layer material consisting of traditional bonding layer materials combined with metal inverse opal (MIO) particles. This composite structure provides both the bonding functionality and the thermal stress compensation needed for high-temperature operation, resolving the contradiction between bonding reliability and temperature resistance
2Ease of manufacture
If bonding layers with melting points below TLP sintering temperature are used, then TLP bonding can proceed, but thermal stress compensation during cooling is insufficient
Solution Approach 1:
The patent applies local quality by creating a bonding layer with non-uniform MIO particle distribution and graded porosity. The bonding layer has regions with different MIO concentrations and pore structures, allowing it to provide both TLP bonding functionality (through low-melting-point regions) and thermal stress compensation (through high-MIO regions with matched CTE) simultaneously during the cooling process
3Reliability
If MIO layer with graded porosity is implemented, then thermal stress compensation is improved, but manufacturing complexity increases
Solution Approach 1:
The patent utilizes porous MIO materials with controlled porosity gradients to achieve thermal stress compensation. The porous structure of the MIO particles and the graded porosity distribution within the bonding layer provide the necessary compliance and CTE matching while maintaining a relatively simple overall bonding layer architecture that can be manufactured using conventional techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MIO layer with graded porosity and stiffness effectively compensates for thermally-induced stresses, preventing delamination and ensuring high-temperature bonding strength, thereby securing the semiconductor devices to the metal substrate and maintaining assembly integrity.
Implementation Method 1
The semiconductor devices and metal substrates have different coefficients of thermal expansion (CTE) and large thermally-induced stresses (e.g., cooling stresses) may be generated between a semiconductor device and metal substrate upon cooling from a TLP sintering temperature
Implementation Method 2
The bonding layer at least partially melts and isothermally solidifies to form a TLP bond between the semiconductor device and metal substrate at TLP bonding temperatures
Implementation Method 3
The TLP sintering of a power electronics device utilizes a bonding layer disposed (sandwiched) between a semiconductor device and metal substrate. The bonding layer at least partially melts and isothermally solidifies to form a TLP bond
Data Source
AI summary
A thermal stress compensation layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity disposed between a pair of bonding layers. The thermal stress compensation layer has a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the MIO layer can be transient liquid phase bonded between a metal substrate and a semiconductor device. The pair of bonding layers may comprise a first pair of bonding layers and a second pair of bonding layers with the first pair of bonding layers disposed between the MIO layer and the second pair of bonding layers. The first pair of bonding layers may have a melting point above the TLP sintering temperature and the second pair of bonding layers may have a melting point below the TLP sintering temperature.