Metal Layer Interconnect Layout for Low-Inductance Chip Driving
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Solution Overview
Problem
In electronic apparatuses where substrates with electronic and driving components are connected via wiring members, the increased wire length leads to defects such as increased inductance and noise, hindering high-speed driving of the electronic components.
Innovation Solution
The electronic apparatus includes a first metal layer with a terminal portion that protrudes to connect with a wire portion of a second metal layer, reducing wire length and inductance, and is sealed with resin to prevent noise interference, allowing for high-speed driving of semiconductor chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two independent substrates are connected by a wiring member, then electrical connection between electronic component and driving component is achieved, but wire length increases causing increased inductance and noise
Solution Approach 1:
The patent merges the electronic component substrate and driving component substrate into a single integrated substrate structure. The electronic component and driving component are mounted on the same substrate, eliminating the need for external wiring members to connect separate substrates. This integration directly reduces wire length, inductance, and noise while maintaining reliable electrical connection.
Solution Approach 2:
The patent transitions from a three-dimensional arrangement with separate substrates connected by wires to a two-dimensional planar integration on a single substrate. By layoutting the electronic component, driving component, and wiring patterns on the same substrate plane, the patent eliminates the vertical separation and long inter-substrate connections, thereby reducing inductance and noise.
2Object-affected harmful factors
If wire length is reduced to decrease inductance and noise, then high-speed driving is enabled, but connection complexity between metal layers increases
Solution Approach 1:
The patent segments the connection structure into multiple functional metal layers: a first metal layer for mounting the electronic component, a second metal layer for mounting the driving component, and intermediate connection structures (via holes, conductive patterns) for electrical connection. This segmentation allows optimization of each layer's function while managing overall connection complexity through systematic layering.
Solution Approach 2:
The patent introduces intermediary connection structures including via holes filled with conductive material and conductive patterns on intermediate layers. These intermediaries facilitate electrical connection between the first and second metal layers while maintaining short wire lengths. The via holes and conductive patterns act as mediators that enable vertical and lateral connections without requiring long external wires.
Data Source
AI summary
An electronic apparatus includes a first metal layer, a component mounting substrate, a second metal layer, and sealing resin. The first metal layer includes a first mounting portion and a second mounting portion. The component mounting substrate includes an electronic component mounted on the first mounting portion. The second metal layer is arranged on the first metal layer such that the second metal layer and the second mounting portion sandwich a driving component. The sealing resin fills a space between the first metal layer and the second metal layer, covers the component mounting substrate, and seals the electronic component and the driving component. The first metal layer includes a terminal portion that protrudes from the first mounting portion toward the second metal layer. The second metal layer includes a wire portion that comes into contact with the terminal portion and connects the second metal layer to the first mounting portion.


