Metal Oxide Alloy Layer for High-k Gate Dielectrics
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor devices, especially DRAM, the reduced size of cell regions leads to insufficient capacitance due to the inverse proportionality of capacitance to the distance between electrodes, and the use of metal oxides like hafnium oxide as gate insulation layers can result in reduced electron mobility due to impurity penetration, necessitating a material with improved leakage current characteristics and high dielectric constant.
Innovation Solution
A metal oxide alloy layer is formed by alternately stacking layers of different metal oxides, such as aluminum oxide and titanium oxide, with controlled thicknesses to create a single-layered structure that mixes the oxides, allowing them to intermix and form a high dielectric constant layer with improved leakage current characteristics, using atomic layer deposition (ALD) processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Force
If hafnium oxide layer is used as gate insulation layer, then high dielectric constant is achieved, but impurities penetrate into channel region reducing electron mobility
Solution Approach 1:
The patent uses a composite metal oxide alloy layer comprising multiple metal oxides (such as hafnium oxide, aluminum oxide, and titanium oxide) instead of a single metal oxide material. This composite structure achieves high dielectric constant while preventing impurity penetration into the channel region, thereby maintaining electron mobility. The alloy layer combines the advantages of different metal oxides to simultaneously improve dielectric properties and protect against contamination.
Solution Approach 2:
The patent creates a metal oxide alloy layer with spatially varying composition and properties. By controlling the distribution of different metal oxides within the alloy layer, the invention achieves high dielectric constant in regions where needed while maintaining low impurity penetration characteristics in regions adjacent to the channel, thus locally optimizing both dielectric performance and electron mobility protection.
2Productivity
If cell region size is reduced for high integration, then device density increases, but capacitance becomes insufficient
Solution Approach 1:
The patent changes the material parameters of the gate insulation layer by using metal oxide alloy layers with high dielectric constants (k > 10). This parameter change allows the capacitor to achieve sufficient capacitance even with reduced electrode area, enabling high device integration density while maintaining adequate capacitance values for proper device operation.
Solution Approach 2:
By employing composite metal oxide alloy layers with tailored compositions, the invention achieves enhanced dielectric constants that compensate for the reduced cell region area. The composite structure provides higher capacitance per unit area, allowing sufficient total capacitance to be achieved within the constrained small footprint of highly integrated devices.
3Reliability
If thin layer with high dielectric constant is used, then leakage current is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent merges multiple metal oxide layers into a single integrated metal oxide alloy layer structure. Instead of manufacturing separate layers with different functions, the invention combines the high dielectric constant function and low leakage current function into a single alloy layer, simplifying the manufacturing process while achieving both performance goals simultaneously.
Solution Approach 2:
The metal oxide alloy layer serves as a composite material that integrates multiple functional properties into a single layer. This composite approach eliminates the need for multiple separate thin layers, reducing manufacturing complexity while maintaining the benefits of high dielectric constant and low leakage current characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The resulting metal oxide alloy layer provides enhanced leakage current characteristics and a high dielectric constant, suitable for semiconductor devices with design rules of 70 nm or less, effectively addressing the capacitance and electron mobility issues.
Implementation Method 1
a value of the first thickness is such that the first metal oxide is allowed to move into the second layer and a value of the second thickness is such that the second metal oxide is allowed to move into the first layer to form a single-layered structure in which the first and second metal oxides are mixed
Data Source
AI summary
A metal oxide alloy layer comprises a first layer including a first metal oxide and having a first thickness, and a second layer formed on the first layer, the second layer including a second metal oxide and having a second thickness, wherein a value of the first thickness is such that the first metal oxide is allowed to move into the second layer and a value of the second thickness is such that the second metal oxide is allowed to move into the first layer to form a single-layered structure in which the first and second metal oxides are mixed.