Metal Oxide Transistor Backup Circuit for Low Leakage Power Gating
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Solution Overview
Problem
The challenge in reducing power consumption in integrated circuits (ICs) lies in the increasing leakage currents due to transistor scaling, which hinders high performance and integration, and existing power gating methods require significant area for backup circuits.
Innovation Solution
A storage device with a backup circuit utilizing a metal oxide transistor for low off-state current, reducing area overhead and enabling efficient power gating by using a bistable circuit, transistors, and a capacitor to store data during power-off states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power gating is implemented to reduce power consumption, then power consumption is reduced, but area of backup circuit increases
Solution Approach 1:
The patent changes the key parameter of the backup circuit transistor from conventional semiconductor material to metal oxide semiconductor material. This material parameter change enables extremely low off-state current (10^-21 to 10^-24 A), allowing the backup circuit to retain data during power-off states with minimal leakage, thereby reducing the required backup circuit area while maintaining power gating functionality
Solution Approach 2:
The patent creates a simplified copy of the data storage function using metal oxide transistor-based backup circuit that requires fewer transistors (6T) compared to conventional backup circuits. The metal oxide transistor's inherent low leakage特性 allows this reduced-complexity copy to maintain data retention capability during power gating
2Quantity of substance
If transistor scaling is performed to increase integration, then integration increases, but leakage current increases
Solution Approach 1:
The patent fundamentally changes the material parameter of the transistor channel from conventional semiconductor to metal oxide semiconductor. This material parameter change results in extremely low off-state current (10^-21 to 10^-24 A) that does not scale poorly with device dimensions, enabling continued transistor scaling for higher integration without the usual leakage current penalty
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the area of backup circuits and achieves low-power operation by leveraging the low leakage current of metal oxide transistors, allowing for efficient data retention and recovery in ICs.
Implementation Method 1
The third transistor includes a metal oxide in a channel formation region... By taking advantage of extremely low off-state current of the OS transistor, a backup circuit capable of retaining data even when powered off has been proposed
Implementation Method 2
A first terminal of the capacitor is electrically connected to the retention node, and a second terminal of the capacitor is electrically connected to the first wiring
Data Source
AI summary
A storage device capable of performing power gating is provided. A memory cell of the storage device includes a bistable circuit, a first transistor, a second transistor, and a backup circuit. The first transistor and the second transistor are electrically connected to a first bit line and a second bit line, respectively. A precharge circuit that precharges the first bit line and the second bit line with different voltages is provided. The backup circuit includes a retention node, an input node, an output node, a third transistor, a fourth transistor, and a capacitor. The third transistor controls electrical continuity between the retention node and the input node. A gate of the fourth transistor and a terminal of the capacitor are electrically connected to the retention node. The input node is electrically connected to one of nodes Q and Qb of the bistable circuit, and the output node is electrically connected to the other of the nodes Q and Qb of the bistable circuit.