Metal Oxide Buffer Layer for Array Substrate Signal Delay
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Solution Overview
Problem
Large-sized, high-resolution flat panel display devices face signal delay issues due to high signal resistance and capacitance in gate and data lines, leading to non-uniform pixel charging and compromised image quality, with existing methods like using Cu for lower resistivity lines requiring costly and damaging buffer layers.
Innovation Solution
An array substrate with a metal oxide buffer layer, such as indium tin oxide or indium zinc oxide, is used to enhance adhesion and reduce signal delay, featuring a simplified patterning process where the buffer layer is integrated with pixel or common electrodes in the same layer, and a two- or three-layered gate insulating structure to improve image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal Cu is used to make gate lines and data lines to lower resistance, then signal delay is reduced, but a buffer layer is required due to poor adhesion, increasing process complexity and cost
Solution Approach 1:
The patent introduces an aluminum oxide buffer layer as an intermediary between the glass substrate and the thin film transistor structure. This buffer layer serves multiple functions: it provides adhesion for the subsequent metal layers, acts as a barrier layer, and enables the use of aluminum instead of copper for gate lines and data lines, thereby simplifying the manufacturing process while maintaining signal transmission quality
Solution Approach 2:
The patent changes the material parameter from copper to aluminum for the gate lines and data lines. Aluminum has different properties than copper, particularly in terms of adhesion to the buffer layer and etch characteristics. This parameter change allows the use of a simpler buffer layer material (aluminum oxide) that can be readily deposited and patterned, reducing process complexity while still achieving low signal delay
2Strength
If Ti or Ti alloy buffer layer is used for poor adhesion of metal Cu, then adhesion is improved, but acid liquid HF is required in the etch process which erodes glass substrate, deteriorating array substrate performance
Solution Approach 1:
The patent uses aluminum oxide as an intermediary buffer layer between the glass substrate and the metal layers. Aluminum oxide can be effectively deposited and patterned without requiring HF etching, thus providing the necessary adhesion and barrier functions while avoiding the harmful erosion of the glass substrate that occurs with Ti-based buffer layers
Solution Approach 2:
The patent employs aluminum oxide as a disposable buffer layer that performs its adhesion and barrier functions effectively during manufacturing and operation, then can be selectively removed or remains as a non-interfering layer. This approach avoids the need for complex HF etching processes required by Ti-based layers, thereby protecting the glass substrate from erosion
3Manufacturing precision
If multiple patterning processes are used to form buffer layer and TFT patterns separately, then pattern precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges the patterning of the buffer layer with the patterning of the pixel electrodes and common electrodes into a single photolithography process. By designing the buffer layer pattern to coincide with these electrode patterns, the patent achieves the necessary pattern precision while significantly reducing the number of separate patterning steps required, thereby lowering manufacturing costs
4Manufacturing precision
If buffer layer is formed in separate patterning process from pixel electrodes, then pattern accuracy is improved, but device complexity increases
Solution Approach 1:
The patent combines the buffer layer formation with the pixel electrode and common electrode formation in a single patterning step. The buffer layer is designed to be positioned where these electrodes will be formed, allowing all three structures to be created simultaneously through one photolithography and etching process, thus maintaining pattern accuracy while reducing overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces signal delay, improves image quality by enhancing adhesion and transmittance, and simplifies the manufacturing process, lowering costs while maintaining high resolution and brightness.
Implementation Method 1
employing metal Cu with lower resistivity to make gate lines and date lines. However, there are following defects: A buffer layer is required due to poor adhesion of metal Cu to the substrate
Implementation Method 2
Delay of image signals is mainly determined by signal resistance R and related capacitance C of gates, gate lines or data lines
Implementation Method 3
Gate insulating layer of the thin film transistor has a two-layered structure or a three-layered structure
Data Source
AI summary
Embodiments of the present application provide an array substrate and a method for fabricating the same. The array substrate comprises: a base substrate, a plurality of thin film transistors formed on the base substrate; the array substrate also comprising: a buffer layer formed on the substrate between the substrate and the film transistors; wherein, the buffer layer is a metal oxide film layer. Embodiments of the present application also provide a display device having such array substrate.