Metal Oxide Catalyzed Crystallization of Amorphous Silicon

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Solution Overview

Problem

Existing methods for forming polycrystalline silicon in semiconductor devices often result in poor quality due to small particle size and high defect rates, and the use of metal catalysts can lead to metallic pollution and leakage currents.

Innovation Solution

A method involving the formation of a metal oxide layer using atomic layer deposition or plasma-enhanced atomic layer deposition, which acts as a catalyst to crystallize an amorphous semiconductor layer into a polycrystalline semiconductor layer, reducing metallic pollution and improving crystallization quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If direct evaporation method is used to form polycrystalline silicon, then the formation process is simple and direct, but the particle size is small, defects are numerous, and the quality is poor

Engineering Contradiction:
Improveformation process simplicityVSAvoidpolycrystalline silicon quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

An amorphous silicon layer is formed as a preliminary step before crystallization. This amorphous layer serves as a precursor that can be systematically crystallized through controlled thermal processing, ensuring uniform grain structure and high quality polycrystalline silicon formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The crystallization process utilizes controlled temperature parameters, heating the amorphous silicon layer to specific temperature ranges (400-600°C) to induce systematic crystallization. By precisely controlling temperature, time, and atmosphere parameters, high-quality polycrystalline silicon with large grain size and few defects is achieved.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If laser crystallization method is used, then polycrystalline silicon with fewer particle defects can be formed, but the process complexity increases

Engineering Contradiction:
Improveparticle defect reductionVSAvoidcrystallization process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex laser crystallization equipment with a simpler thermal crystallization process using conventional heating equipment. The amorphous silicon layer is crystallized through controlled thermal processing in a furnace, achieving similar or better crystallization quality without requiring sophisticated laser systems.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Temperature

If metal catalyst is used for crystallization, then crystallization can occur at lower temperatures, but metallic pollution occurs and leakage current increases

Engineering Contradiction:
Improvecrystallization temperatureVSAvoidmetallic pollution and leakage current
Core Design Contradiction:
TemperatureVSObject-generated harmful factors

Solution Approach 1:

The patent completely removes metal catalysts from the crystallization process. Instead of using metal-induced crystallization methods that leave residual metal contamination, the invention employs pure thermal crystallization of amorphous silicon, eliminating the source of metallic pollution and associated leakage current problems.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The crystallization process is conducted in an inert or controlled atmosphere (such as nitrogen or forming gas) to prevent oxidation and contamination. This clean environment ensures that no extraneous metals or impurities are introduced during the thermal crystallization process, maintaining high material purity.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

4Temperature

If solid-phase crystallization method is used, then polycrystalline silicon can be formed at around 600°C, but the glass substrate bends and changes in size

Engineering Contradiction:
Improvecrystallization temperatureVSAvoidsubstrate dimensional stability
Core Design Contradiction:
TemperatureVSStability of the object's composition

Solution Approach 1:

The amorphous silicon layer is formed as a thin preliminary layer (50-200 nm) before crystallization. This thin layer requires less thermal energy for crystallization, allowing the process to be completed at lower temperatures (400-600°C) with shorter processing times, thereby minimizing thermal stress and dimensional changes in the glass substrate.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a thin amorphous silicon layer that requires only partial crystallization thickness to achieve the desired device performance. This reduces the total thermal energy input required, minimizing substrate heating and preventing excessive bending or size changes while still achieving sufficient polycrystalline silicon formation for device operation.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the crystallization of amorphous silicon layers into high-quality polycrystalline silicon with reduced defects and metallic impurities, improving the performance and reliability of semiconductor devices by minimizing contact resistance and preventing metallic pollution.

Implementation Method 1

forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer

Methodology Applied
Scientific EffectCatalysis: Catalysis

Implementation Method 2

The metal oxide layer may be formed using one of an atomic layer deposition and a plasma-enhanced atomic layer deposition

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Implementation Method 3

The metal oxide layer may be formed using one of an atomic layer deposition and a plasma-enhanced atomic layer deposition

Methodology Applied
Scientific EffectPlasma-enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS9184052B2Semiconductor device and manufacturing method of semiconductor device using metal oxide
Publication Date: 2015.11.10 SAMSUNG ELECTRONICS CO LTD
  • US9184052B2 patent drawing
  • US9184052B2 patent drawing
  • US9184052B2 patent drawing

AI summary

A method of manufacturing a semiconductor device using a metal oxide includes forming a metal oxide layer on a substrate, forming an amorphous semiconductor layer on the metal oxide layer, and forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer.