Metal-Oxide Inner Spacer for Reliable Nanosheet Source/Drain Regions
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Solution Overview
Problem
The reliability of source/drain regions in semiconductor devices is compromised due to the limitations in current technologies, particularly in the integration of nanosheets and gate electrodes, which affect the overall performance and scalability of multi-gate transistors.
Innovation Solution
The introduction of a semiconductor device design featuring a substrate with nanosheets surrounded by a gate electrode and an inner spacer made of metal oxide, where the inner spacer is formed by oxidizing the same material as the metal doped in the source/drain region, enhancing the contact and reliability between the gate electrode and the source/drain region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If scaling is performed to increase density, then device density is improved, but manufacturing precision and reliability may deteriorate
Solution Approach 1:
The patent applies local quality enhancement by introducing metal doping specifically in the source/drain region (first layer) rather than throughout the entire device. This localized material modification improves manufacturing precision and reliability in the critical source/drain region while maintaining the overall scaled-down device dimensions and high density
Solution Approach 2:
The metal doping is performed as a preliminary action during the formation of the source/drain region, before final device assembly and testing. This advance material preparation ensures that the source/drain region has the required electrical and structural properties from the outset, maintaining manufacturing precision during scaling
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the reliability of the source/drain regions by forming a stable metal oxide inner spacer, which enhances the electrical properties and scalability of the multi-gate transistors, effectively suppressing short channel effects and improving current control.
Implementation Method 1
the inner spacer including a metal oxide formed by oxidizing the same material as the metal
Data Source
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AI summary
A semiconductor device includes: a substrate (100), an active pattern (101) extending in a first horizontal direction (DR1) on the substrate, a plurality of nanosheets (NW1 .. NW4) spaced apart from each other and stacked in a vertical direction on the active pattern, a gate electrode (G) extending in a second horizontal direction (DR2) different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region (120) disposed on at least one side of the gate electrode on the active pattern, the source/drain region including a first layer (121) doped with a metal, and a second layer (122) disposed on the first layer, and an inner spacer (130) disposed between the gate electrode and the first layer, between each of the plurality of nanosheets, the inner spacer in contact with the first layer, the inner spacer including a metal oxide formed by oxidizing the same material as the metal.