Three-Transistor Memory Cell With Metal Oxide Channel for Low Leakage
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Solution Overview
Problem
Current semiconductor devices struggle to provide a memory solution with extremely low off-state current and high reliability for long-term data retention while minimizing power consumption.
Innovation Solution
A semiconductor device is designed with a specific configuration including transistors and a capacitor, where one transistor has a metal oxide in the channel formation region and another has silicon, allowing for efficient data writing, retention, and reading with low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional silicon transistors are used in memory devices, then manufacturing compatibility is improved, but off-state current is excessively high causing power consumption issues
Solution Approach 1:
The patent applies local quality by using metal oxide semiconductor material specifically in the channel formation region of the third transistor, while other transistors can use conventional silicon. This localized application of special material properties achieves low off-state current where needed (in the memory retention path) without requiring complete fabrication process overhaul, thus resolving the contradiction between manufacturing compatibility and energy loss.
Solution Approach 2:
The patent employs composite materials by combining metal oxide semiconductor with conventional silicon-based materials in the same device. The metal oxide channel region provides low off-state current characteristics while being integrated with standard CMOS-compatible fabrication processes. This composite approach allows achieving low power consumption memory functionality while maintaining ease of manufacture through hybrid material usage.
2Loss of energy
If metal oxide transistors are used to reduce off-state current, then power consumption is reduced, but device complexity increases due to additional material integration
Solution Approach 1:
The patent applies parameter changes by modifying the semiconductor material parameter (using metal oxide instead of silicon) specifically in the channel formation region of the third transistor. This targeted parameter change achieves dramatically reduced off-state current and power consumption in the memory retention path. The complexity is managed by limiting this material change to only where needed rather than throughout the entire device.
Solution Approach 2:
The patent segments the transistor population by function: the first and second transistors can use conventional silicon for high-speed switching, while the third transistor uses metal oxide for low-leakage data retention. This functional segmentation allows each transistor type to be optimized for its specific role, reducing overall power consumption without unnecessarily complicating the entire device structure.
3Reliability
If a three-transistor configuration with capacitor is used for data retention, then data retention reliability is improved, but device area increases
Solution Approach 1:
The patent employs another dimension by implementing the three-transistor-one-capacitor memory cell in a stacked or integrated layout rather than a simple planar expansion. The metal oxide transistor's compact structure allows for vertical stacking or denser integration, achieving high reliability data retention through the capacitor-transistor combination while minimizing the horizontal device area through three-dimensional space utilization.
Data Source
AI summary
A semiconductor device includes a first transistor one of a source and a drain of which is electrically connected to a first wiring for reading data; a second transistor one of a source and a drain of which is electrically connected to a gate of the first transistor and the other of the source and the drain of which is electrically connected to a second wiring for writing the data; and a third transistor one of a source and a drain of which is electrically connected to the gate of the first transistor and the other of the source and the drain of which is electrically connected to a capacitor for retaining electric charge corresponding to the data, and the third transistor includes a metal oxide in a channel formation region.