Metal Oxide Patterns for Semiconductor Integration Density
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Solution Overview
Problem
The miniaturization of semiconductor devices poses challenges in pattern fabrication due to decreasing process margins, complexity, and sensitivity to environmental factors, making it difficult to form patterns with desired characteristics.
Innovation Solution
A method involving the formation of a dielectric interlayer, a metal pattern, oxidization to create a conductive metal oxide pattern, and planarization, including a reduction process in a hydrogen or hydrogen/nitrogen atmosphere, with optional steps like forming a barrier pattern and capping dielectric layer, to achieve a flat and stable surface for further layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pattern size is decreased to achieve high integration, then device functionality is improved, but process margins and manufacturing precision deteriorate
Solution Approach 1:
The patent changes the material parameter from metal to metal oxide, which fundamentally alters the etching characteristics and allows for better control of pattern dimensions. The metal oxide material provides different etch selectivity and anisotropy, enabling precise pattern formation even at reduced sizes with smaller process margins.
Solution Approach 2:
The patent replaces the conventional metal filling process with an oxidization-based approach. Instead of relying on physical vapor deposition or electroplating of metal, the invention uses chemical oxidization of a sacrificial layer to form metal oxide patterns, which are then etched. This substitution provides better process control and precision for miniaturized patterns.
2Productivity
If pattern size is decreased to achieve high integration, then device functionality is improved, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary oxidization of the sacrificial layer before pattern transfer. By pre-forming the metal oxide structure with controlled stoichiometry and morphology, the subsequent etching process becomes simpler and more predictable, reducing overall fabrication complexity despite miniaturization.
Solution Approach 2:
The patent introduces metal oxide as an intermediary material between the sacrificial layer and the final metal pattern. This intermediary enables controlled pattern formation through selective etching, simplifying the overall process compared to direct metal pattern formation at reduced dimensions.
3Productivity
If pattern size is decreased to achieve high integration, then device functionality is improved, but sensitivity to peripheral environment increases
Solution Approach 1:
The patent changes the material composition to metal oxide, which has different physical and chemical properties compared to metal. The metal oxide provides better stability against environmental factors such as oxidation, contamination, and stress, reducing sensitivity to peripheral environment variations in miniaturized devices.
Solution Approach 2:
The patent employs composite structures involving metal oxide patterns integrated with dielectric and sacrificial layers. This composite approach provides environmental protection and stability to the miniaturized patterns, reducing their sensitivity to external factors while maintaining high integration density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of semiconductor devices with improved planarization and reduced characteristic degradation, allowing for the formation of variable resistors with multiple resistance states and enhanced electrical connectivity.
Implementation Method 1
performing an oxidization process on the metal pattern to form a conductive metal oxide pattern
Implementation Method 2
performing a reduction process on the planarized conductive metal oxide pattern. The reduction process may be performed in a hydrogen atmosphere or in a hydrogen/nitrogen atmosphere
Data Source
AI summary
Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.