Metal Oxide Thin Film Transistor Fabrication via Anodic Oxidation

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Solution Overview

Problem

Traditional silicon-based thin film transistors, such as amorphous silicon and polycrystalline silicon transistors, face limitations in high mobility, performance degradation, and high fabrication costs, making them unsuitable for advanced display technologies, while metal oxide thin film transistors offer advantages like low process temperature, high carrier mobility, and uniformity but require complex processes to achieve proper resistance levels for the channel and source/drain layers.

Innovation Solution

A method for fabricating metal oxide thin film transistors using anodic oxidation to form a high resistance channel layer and low resistance source/drain layers in a single deposition step, simplifying the fabrication process and reducing production costs by employing DC magnetron sputtering and plasma enhanced chemical vapor deposition techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ion implantation is used to reduce source and drain resistance in metal oxide transistors, then resistance is reduced, but the fabrication process becomes more complex

Engineering Contradiction:
Improvesource and drain resistanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the ion implantation step from the fabrication process entirely. Instead of using ion implantation to reduce source and drain resistance, the invention uses a different approach: forming the source and drain from the same metal oxide semiconductor material through selective etching, eliminating the need for additional ion implantation processes while maintaining low resistance characteristics.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The metal oxide semiconductor material serves multiple functions simultaneously: it forms both the active channel region and the source/drain regions. By using the same material for both purposes and controlling its properties through deposition conditions and selective etching, the patent eliminates the need for separate material layers and complex ion implantation processes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional metal layers are added to reduce source and drain resistance, then resistance is reduced, but fabrication complexity increases

Engineering Contradiction:
Improvesource and drain resistanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal oxide semiconductor material serves dual purposes as both the active channel and the source/drain regions. By controlling the deposition conditions and applying selective etching, the same material layer provides both low-resistance contact regions and the active channel, eliminating the need for additional metal layers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the channel layer and source/drain layers into a single metal oxide semiconductor layer. Through selective etching processes, different regions of the same layer are differentiated to form the channel and source/drain structures, combining multiple functions into one material layer.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the formation of high resistance metal oxide semiconductor channels and low resistance metal sources/drain without additional processing steps, simplifying the fabrication process and reducing costs, making it suitable for large-size, high-resolution displays.

Implementation Method 1

growing a metal layer with a thickness of 10 ̃100 nm on the gate dielectric layer, wherein this growing employs a DC magnetron sputtering method

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 2

the metal of the channel is anodized at atmospheric pressure and room temperature, so as to form a metal oxide semiconductor layer

Methodology Applied
Scientific EffectAnodic oxidation: Anodising

Implementation Method 3

depositing a silicon nitride layer on the active region by using a plasma enhanced chemical vapor deposition method

Methodology Applied
Scientific EffectPlasma enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS9893173B2Method for fabricating a metallic oxide thin film transistor
Publication Date: 2018.02.13 PEKING UNIV SHENZHEN GRADUATE SCHOOL
  • US9893173B2 patent drawing
  • US9893173B2 patent drawing
  • US9893173B2 patent drawing

AI summary

A method for fabricating a metal oxide thin film transistor comprises the steps of: selecting a substrate and fabricating a gate electrode on the substrate; growing a layer of dielectric or a high permittivity dielectric on the substrate, and allowing the layer of dielectric or high permittivity dielectric to cover the gate electrode to serve as a gate dielectric layer; growing a metal layer on the gate dielectric layer; fabricating a channel in the middle position of the metal layer; anodizing the metal of the channel at atmospheric pressure and room-temperature; fabricating an active region comprising a source, a drain, and the channel; depositing a silicon nitride layer on the active region and forming two contact holes of the electrodes on the silicon nitride layer; and depositing a layer of aluminum film and fabricating two metal contact electrodes of the thin film transistor.