Metal Oxide Thin Film Transistor Fabrication via Anodic Oxidation
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Solution Overview
Problem
The existing methods for fabricating silicon-based thin film transistors face challenges such as low mobility, performance degradation, high process temperatures, and high manufacturing costs, which restrict their application in advanced display technologies. Additionally, the growth of passivation layers in metal oxide thin film transistors is difficult due to plasma bombardment, leading to electrical performance degradation and increased complexity.
Innovation Solution
A method for fabricating metal oxide thin film transistors using anodic oxidation of double-layer metal films to form both the channel and passivation layers, which simplifies the process, reduces production costs, and prevents plasma damage to the channel surfaces, while allowing for the use of metals and oxides not resistant to acid and alkali through protection by an upper metal layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PECVD is used to grow SiO2 passivation layer, then passivation layer can be formed, but plasma bombardment damages the channel layer causing electrical performance degradation
Solution Approach 1:
The patent introduces an intermediary protective layer (such as alumina or silica) between the plasma environment and the channel layer. This protective layer acts as a buffer that absorbs the harmful plasma bombardment while allowing the passivation function to be maintained, thereby protecting the channel layer from damage and preserving device performance.
Solution Approach 2:
The patent employs an inert atmosphere approach by using materials that are resistant to plasma damage and create a protective environment for the channel layer. The protective layer provides an inert barrier that prevents direct interaction between the plasma and the sensitive channel layer, eliminating the harmful effects of plasma bombardment.
2Reliability
If additional low resistance metal layer is added to reduce parasitic resistance of source and drain, then resistance is reduced, but fabrication process complexity increases
Solution Approach 1:
The patent merges the source/drain electrode function with the protective layer function into a single integrated structure. The protective layer is designed to serve dual purposes: protecting the channel from plasma damage and functioning as the source/drain electrode, thereby eliminating the need for separate low-resistance metal layers and simplifying the fabrication process.
Solution Approach 2:
The patent implements multi-functionality by designing the protective layer to perform multiple functions simultaneously: it protects the channel layer from plasma bombardment, serves as a passivation layer, and acts as the source/drain electrode. This universal approach reduces the number of separate components and simplifies the overall device structure and fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively forms stable metal oxide semiconductor and dielectric layers, simplifies the fabrication process, reduces parasitic resistance, and lowers production costs, making it suitable for large-size, high-resolution transparent displays.
Implementation Method 1
anodic oxidation of double-layer metal films to form both the channel and passivation layers
Implementation Method 2
growing a first metal layer with thickness of 10-100 nm on the gate dielectric layer, the growing method uses a direct current magnetron sputtering method
Data Source
AI summary
A method for fabricating a metal oxide thin film transistor comprises selecting a substrate and fabricating a gate electrode thereon; growing a layer of dielectric or high permittivity dielectric on the substrate to serve as a gate dielectric layer; growing a first metal layer on the gate dielectric layer and a second metal layer on the first metal layer; fabricating a channel region at a middle position of the first metal layer and a passivation region at a middle position of the second metal layer; anodizing the metals of the passivation region and the channel region at atmospheric pressure and room temperature; fabricating a source and a drain; forming an active region comprising the source, the drain, and the channel region; depositing a silicon nitride layer on the active region; fabricating two electrode contact holes; depositing a metal aluminum film; and fabricating two metal contact electrodes by photolithography and etching.