Metal Oxide Semiconductor Structure for Dense, Uniform Transistors
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Solution Overview
Problem
Current semiconductor devices face challenges in miniaturization, high integration, and achieving favorable electrical characteristics, including low power consumption and high on-state current, while maintaining reliability and reducing variations in transistor electrical characteristics.
Innovation Solution
A semiconductor device structure incorporating a metal oxide with depressed portions filled by conductors and insulators, where the conductors' top surfaces are level with the metal oxide, and the insulators are positioned to overlap with the metal oxide, enhancing contact resistance and channel formation regions, thereby improving on-state characteristics and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional semiconductor structures are used, then manufacturing is simpler, but device size cannot be sufficiently miniaturized and integration density is limited
Solution Approach 1:
The patent introduces a third dimension by forming depressed portions (holes) in the metal oxide layer and filling them with conductors. This vertical structuring allows multiple conductors to be positioned at different depths within the metal oxide, enabling higher integration density without increasing planar footprint. The depressed portions create vertical stacking opportunities that reduce device area while maintaining functionality.
Solution Approach 2:
The patent embeds conductors within depressed portions of the metal oxide layer, creating a nested structure where conductors are positioned inside cavities formed in the metal oxide. This nesting approach allows multiple conductors to occupy overlapping planar spaces at different vertical levels, achieving miniaturization and high integration by utilizing three-dimensional space efficiently.
2Productivity
If transistor size is reduced for higher integration, then integration density improves, but variations in electrical characteristics increase
Solution Approach 1:
The patent creates locally differentiated regions by forming depressed portions at specific locations within the metal oxide layer. Each depressed portion containing a conductor represents a localized structural modification that optimizes electrical characteristics for that specific region. This local quality approach allows precise control of electrical properties in miniaturized transistors, reducing variations by ensuring uniform conductor-metal oxide interface conditions across different device locations.
Solution Approach 2:
The patent performs preliminary structuring of the metal oxide layer by forming depressed portions before conductor deposition. This preliminary action ensures that conductors are placed in pre-defined, uniform locations with controlled dimensions and spacing. By establishing the depressed portion geometry beforehand, the patent achieves consistent electrical characteristics across miniaturized devices, reducing variations that would otherwise occur with random or less controlled conductor placement.
3Loss of energy
If power consumption is reduced, then energy efficiency improves, but on-state current decreases
Solution Approach 1:
The patent utilizes parameter changes in the metal oxide material properties, specifically exploiting its ability to exist in different resistance states. By controlling the electrical characteristics of the metal oxide layer and its interface with conductors in the depressed portions, the patent achieves low off-state current (low power consumption) while maintaining high on-state current through material parameter optimization and structural design.
Solution Approach 2:
The patent employs a composite structure combining metal oxide with conductive materials in a specific configuration. The metal oxide layer with embedded conductors creates a composite system that leverages the high resistance of metal oxide in off-state for low power consumption, while the conductor-metal oxide interface enables high on-state current when activated, thus resolving the contradiction between power consumption and on-state current.
Data Source
AI summary
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator, a first metal oxide, a first conductor, a second conductor, and a third conductor. The first metal oxide includes a first depressed portion, a second depressed portion, and a third depressed portion positioned between the first depressed portion and the second depressed portion. The first conductor is provided to fill the first depressed portion, and the second conductor is provided to fill the second depressed portion. A top surface of the first conductor and a top surface of the second conductor are level with or substantially level with a top surface of the first metal oxide. The first insulator is provided inside the third depressed portion. The third conductor is provided over the first insulator and includes a region overlapping with the first metal oxide with the first insulator therebetween.