Metal-Based Passivation for III-V Semiconductor Etching
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Solution Overview
Problem
Current methods for deep anisotropic plasma etching of III-V semiconductor materials face challenges due to high resistance to wet chemical etching, sidewall roughness, and limited mask etch selectivity, particularly when using fluorine-based plasmas, which are not suitable for these materials.
Innovation Solution
The use of a metal-based passivation layer, including elements like Ni, Cr, W, Mo, Pt, Pd, Mg, Ti, Zr, Hf, Y, Ta, and Sc, during plasma etching to improve mask etch selectivity and suppress lateral etching, allowing for deeper, smoother etches with halogen-based or Ar/H2 plasma chemistry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If fluorine-based plasma chemistry is used for dry etching of III-V semiconductors, then etch selectivity to photoresist mask is improved, but mask material performance is restricted or degraded
Solution Approach 1:
A silicon nitride intermediate mask layer is introduced between the photoresist and the III-V semiconductor. This intermediate layer acts as a mediator that is resistant to fluorine-based plasma etching, protecting the photoresist mask from damage while enabling high etch selectivity. The silicon nitride layer serves as a sacrificial mask that can be removed after etching without damaging the underlying structure.
2Object-affected harmful factors
If conventional polymer-based passivation is used for deep anisotropic etching, then sidewall protection is improved, but etch anisotropy and surface smoothness are degraded
Solution Approach 1:
The invention changes the chemical composition parameters of the passivation layer by using silicon nitride instead of organic polymers. This parameter change transforms the passivation mechanism from polymer deposition to inorganic film formation, which provides better sidewall protection without compromising etch anisotropy or surface smoothness. The silicon nitride layer forms a dense, conformal coating that effectively prevents lateral etching.
3Manufacturing precision
If deep plasma etching is performed to achieve high-aspect-ratio structures, then device performance is improved, but sidewall roughness and damage increase
Solution Approach 1:
A silicon nitride passivation layer is deposited on the sidewalls before the deep etching process begins. This preliminary action creates a protective barrier that prevents plasma-induced damage and roughness during the etching of high-aspect-ratio structures. The pre-formed silicon nitride layer remains intact throughout the etching process, ensuring smooth sidewalls and reduced damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances etch selectivity and prevents sidewall roughness, enabling the fabrication of high-aspect-ratio III-V semiconductor structures with improved performance and reduced leakage currents.
Implementation Method 1
performing a plasma etching process on a masked III-V semiconductor
Implementation Method 2
chemical reactions result in the formation of volatile etch byproducts under standard etching conditions
Implementation Method 3
forming a passivation layer on etched portions of the III-V semiconductor
Data Source
AI summary
According to one embodiment, a method includes performing a plasma etching process on a masked III-V semiconductor, and forming a passivation layer on etched portions of the III-V semiconductor. The passivation layer includes at least one of a group III element and/or a metal from the following: Ni, Cr, W, Mo, Pt, Pd, Mg, Ti, Zr, Hf, Y, Ta, and Sc.