Metal Posts for Stress Relief at Flatness Discontinuities
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Solution Overview
Problem
Semiconductor devices with solder bumps face reliability issues due to thermomechanical stress and moisture ingress, leading to micro-cracks and failures, particularly at discontinuities in surfaces with different coefficients of thermal expansion, which existing methods have only partially addressed.
Innovation Solution
The introduction of metallic posts with a lower coefficient of thermal expansion, strategically placed at high-stress locations, such as the edges of metal bumps, to reduce thermomechanical stress concentration and prevent moisture ingress, combined with a fabrication process involving polyimide layers and under-bump metal layers to enhance adhesion and stress buffering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder bumps are used to connect chip terminals to leads and outer terminals to substrate pads, then electrical and thermal performance are improved, but thermomechanical stress concentration occurs at surface discontinuities due to large CTE differences between materials
Solution Approach 1:
The patent applies local quality by placing posts specifically at high-stress locations (surface discontinuities) rather than uniformly throughout the structure. The posts are positioned at the interface between the molded compound and metal components where CTE mismatch causes stress concentration, providing localized stress relief where it is most needed while maintaining overall structural integrity.
Solution Approach 2:
The posts act as intermediary elements between materials with different CTE values (metal leads/pads and plastic molded compound). These posts, made from materials with intermediate or matched CTE properties, mediate the thermal expansion differences and prevent direct stress transfer between dissimilar materials, thereby reducing thermomechanical stress concentration.
2Strength
If adhesion enhancement methods are applied (plasma activation, metal layer deposition, surface roughening), then interfacial bonding is improved, but moisture penetration and popcorn effect still occur during temperature cycling
Solution Approach 1:
The patent segments the protective function by introducing posts that create a physical barrier structure at the interface between the molded compound and metal components. This segmentation divides the continuous interface into discrete regions, preventing moisture from forming continuous pathways along the interface, thereby blocking moisture ingress even when adhesion is present.
Solution Approach 2:
The patent converts the harmful effect of thermal expansion mismatch into a beneficial design feature. By intentionally designing posts at discontinuities where CTE differences cause stress concentration, the structure transforms potential failure points into protected zones where the posts provide both stress relief and moisture blocking, turning the harmful CTE mismatch into a design opportunity for enhanced reliability.
3Reliability
If temperature cycling between -55°C and +125°C is applied to test reliability, then solder connection durability is evaluated, but micro-cracks form at joints due to compressive and tensile stresses
Solution Approach 1:
The patent applies beforehand cushioning by placing posts at high-stress locations before temperature cycling occurs. These posts pre-positioned at discontinuities act as cushioning elements that absorb and distribute thermomechanical stresses during subsequent temperature cycling, preventing the formation of micro-cracks in solder joints by relieving stress concentration at critical locations before damage can occur.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces the occurrence of micro-cracks and prevents moisture-induced failures by distributing thermomechanical stress and blocking moisture ingress, thereby enhancing the reliability of semiconductor devices under temperature cycles and operational conditions.
Implementation Method 1
the large differences of coefficients of thermal expansion (CTE) between semiconductor device materials such as silicon, metal leads and metal pads, and plastic materials
Implementation Method 2
the penetrated water molecules cannot accumulate to form films of water on free surfaces
Implementation Method 3
enhancing adhesion between the different device components (package compound, semiconductor chip, substrate, leadframe, etc.)
Data Source
AI summary
A semiconductor device includes a first body having a first coefficient of thermal expansion (CTE) and a first surface, a third body having a third CTE and a third surface facing the first surface, and a fourth surface at an angle with respect to the third surface defining an edge of the third body, and a second body having a second CTE higher than the first and the third CTE, the second body contacting the first and the third surfaces. A post having a fourth CTE lower than the second CTE, transects the second body and contacts the edge.