Metal Resist Defect Correction via Silicon Capping and Plasma Etching

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Solution Overview

Problem

Conventional chemically amplified resists used in semiconductor fabrication fail to achieve the required resolution and sensitivity for the 10-nm node, especially with extreme ultraviolet (EUV) technology, and metal resists leave behind residual particles causing defects during the development process.

Innovation Solution

A method involving the deposition of a metal resist layer followed by a silicon-containing layer, which is then selectively removed using a plasma process with halogen or hydrogen chemistry to clean the surface and form a patterned etch mask, thereby addressing the resolution and defect issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If metal resist is used to achieve required resolution at 10-nm node, then resolution is improved, but residual metal particles cause defects during development

Engineering Contradiction:
ImproveresolutionVSAvoidresidual metal particles
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent divides the resist system into two separate layers: a metal-containing resist layer for achieving high resolution patterning, and a separate organic capping layer that prevents metal particle formation. This segmentation allows each layer to perform its specific function without the harmful interactions that occur in conventional single-layer systems.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The organic capping layer serves as an intermediary between the metal-containing resist and the development process. It protects the metal particles from forming harmful residues during development while allowing the underlying metal pattern to maintain its high-resolution structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If conventional chemically amplified resists are used, then processing is simpler, but required resolution and sensitivity for 10-nm node cannot be achieved

Engineering Contradiction:
Improveprocessing complexityVSAvoidresolution
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent employs a composite resist structure combining metal-containing compounds (for high resolution and sensitivity) with organic capping materials (for processability and defect prevention). This composite approach achieves the required 10-nm node performance while maintaining practical processing capabilities.

Inventive Principle:
Principle #40Composite materials

3Manufacturing precision

If metal resist is used to achieve high resolution, then sensitivity is improved, but additional processing steps are required to remove residual particles

Engineering Contradiction:
ImprovesensitivityVSAvoidprocessing steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The organic capping layer is applied preliminarily during the resist formation process, before development occurs. This preliminary action prevents residual metal particle formation in advance, eliminating the need for additional post-development cleaning steps that would otherwise be required.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the resolution and reduces defects in semiconductor devices by effectively removing residual metal particles, improving the pattern quality and reducing processing complexity.

Implementation Method 1

performing a surface cleaning process by exposing the layer to be patterned and the patterned metal resist layer covered with the silicon containing layer to a plasma process with an etch chemistry comprising a halogen or hydrogen

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 2

selectively depositing a silicon containing layer over the patterned resist layer by exposing the substrate to a gas mixture comprising a silicon precursor

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS11605539B2Defect correction on metal resists
Publication Date: 2023.03.14 TOKYO ELECTRON LTD
  • US11605539B2 patent drawing
  • US11605539B2 patent drawing
  • US11605539B2 patent drawing

AI summary

A method for forming a semiconductor device includes depositing a metal resist layer over a layer to be patterned that is formed over a substrate; patterning the metal resist layer using a lithography process to form a patterned metal resist layer and expose portions of the layer to be patterned; selectively depositing a silicon containing layer over the patterned resist layer by exposing the substrate to a gas mixture comprising a silicon precursor, the silicon containing layer being preferentially deposited over a top surface of the metal resist layer; and performing a surface cleaning process by exposing the layer to be patterned and the patterned metal resist layer covered with the silicon containing layer to a plasma process with an etch chemistry comprising a halogen or hydrogen.