Metal-Seeded Ferroelectric Layer Crystallization in Scaled NCFETs

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Solution Overview

Problem

As semiconductor devices continue to shrink in feature size, challenges arise in integrating more components into smaller areas while maintaining performance, particularly in forming efficient transistors that require precise layer formation and annealing processes to achieve desired crystalline structures and ferroelectric properties.

Innovation Solution

The method involves forming negative capacitance field effect transistors (NCFETs) using ferroelectric materials with a specific annealing process to diffuse metal seeds into a ferroelectric film, followed by crystallization, which helps control grain size and crystalline phase, enabling the formation of a conductive gate stack that enhances transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but manufacturing precision and process control become more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidfeature size control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent segments the gate structure into multiple functional layers including a ferroelectric layer with controlled grain size, a barrier layer, and a conductive layer. This segmentation allows each layer to be optimized independently for its specific function while maintaining overall miniaturization, enabling higher integration density without sacrificing manufacturing precision

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the crystalline phase parameters of the ferroelectric layer by controlling grain size distribution and crystal orientation. By adjusting these parameters, the device achieves desired electrical properties at smaller feature sizes, resolving the contradiction between miniaturization and manufacturing precision

Inventive Principle:
Principle #35Parameter changes

2Reliability

If annealing temperature is increased to improve crystalline structure, then ferroelectric properties are enhanced, but device reliability may deteriorate due to material degradation

Engineering Contradiction:
Improveferroelectric propertiesVSAvoidmaterial degradation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies a preliminary low-temperature annealing treatment before the main high-temperature processing steps. This preliminary action prepares the ferroelectric layer by initiating controlled grain growth and reducing defects, which allows subsequent processing to achieve desired ferroelectric properties without requiring excessively high temperatures that would cause material degradation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates local quality variations within the ferroelectric layer by controlling grain size distribution, creating regions with different crystalline orientations and properties. This allows the material to achieve enhanced ferroelectric characteristics in specific regions without subjecting the entire structure to extreme conditions that would cause widespread degradation

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the creation of transistors with improved switching characteristics at lower voltages, increased integration density, and controlled grain size distribution within the ferroelectric layer, addressing the limitations of traditional semiconductor manufacturing.

Implementation Method 1

a specific annealing process to diffuse metal seeds into a ferroelectric film

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

a specific annealing process to diffuse metal seeds into a ferroelectric film

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 3

followed by crystallization, which helps control grain size and crystalline phase

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS11837660B2Semiconductor device and method
Publication Date: 2023.12.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11837660B2 patent drawing
  • US11837660B2 patent drawing
  • US11837660B2 patent drawing

AI summary

A semiconductor device and method of manufacture are provided which utilizes metallic seeds to help crystallize a ferroelectric layer. In an embodiment a metal layer and a ferroelectric layer are formed adjacent to each other and then the metal layer is diffused into the ferroelectric layer. Once in place, a crystallization process is performed which utilizes the material of the metal layer as seed crystals.