Metal Substrate Semiconductor Package with Insulated Rivets
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Solution Overview
Problem
Conventional semiconductor packages using PCB substrates face challenges with low thermal conductivity, complex fabrication processes, and increased costs due to limited input/output leads and heat dissipation issues.
Innovation Solution
A semiconductor package with a metal substrate and insulated rivets or lands that simplify the fabrication process, enhance thermal conductivity, and increase the number of input/output terminals, using a patterned metal layer and insulation layer to dissipate heat effectively while reducing fabrication complexity and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a PCB substrate is used, then the fabrication process is simplified, but thermal conductivity is insufficient to dissipate heat
Solution Approach 1:
The substrate uses a composite structure combining a metal base layer (high thermal conductivity) with an insulation layer (electrical insulation). This composite material approach allows the substrate to simultaneously achieve excellent thermal dissipation through the metal layer while maintaining electrical insulation properties through the insulation layer, resolving the contradiction between thermal performance and fabrication simplicity.
2Temperature
If a lead frame package is used, then thermal dissipation is improved, but the number of input/output leads is limited by peripheral area constraints
Solution Approach 1:
The invention transitions from peripheral-only I/O arrangement to a dimensional expansion by placing I/O terminals throughout the entire substrate area, including central regions. The metal substrate with distributed I/O terminals allows input/output connections in both peripheral and central areas, dramatically increasing the number of available leads while maintaining effective thermal dissipation through the metal substrate structure.
3Reliability
If a PCB substrate with conductive vias is used, then electrical connections are achieved, but fabrication complexity and costs increase
Solution Approach 1:
The invention extracts and eliminates the complex multi-step process of forming conductive vias, conductive patterns, and lands on insulating substrates. By using a metal substrate with integrated I/O terminals and a simplified insulation layer approach, the design removes the need for via formation, plating, and complex pattern routing, significantly reducing fabrication steps while maintaining reliable electrical connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves thermal dissipation, reduces susceptibility to warpage, and lowers fabrication costs by using a metal substrate with a simplified process, while allowing for a higher number of input/output terminals, similar to conventional BGA packages.
Implementation Method 1
a substrate made of metal, thereby improving efficiency of thermal emission from a semiconductor die mounted to the substrate
Data Source
AI summary
In accordance with the present invention, there is provided a semiconductor package and a fabrication method thereof. The semiconductor package is provided with a substrate made of metal, thereby improving efficiency of thermal emission from a semiconductor die mounted to the substrate, and simplifying the fabrication process for the substrate which reduces fabricating costs. Further, unlike a conventional land, a rivet electrically insulated with the substrate is inserted into a corresponding hole of the substrate, the upper and lower surfaces of the rivet being removed to form land, thereby simplifying the fabrication process for the substrate which further reduces fabricating costs.