Metal Via Surface Planarization for Uniform Interconnect Resistance

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Solution Overview

Problem

The manufacturing process of semiconductor structures results in a height difference between metal via structures due to excess removal of conductor material, leading to non-uniform resistance distribution in the metal interconnect layer.

Innovation Solution

A method is employed to ensure that the top surfaces of metal via structures in the substrate are flush with the substrate surface through a combination of wet and dry etching processes, reducing the height difference and enhancing resistance uniformity in the metal interconnect layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of substance

If excess tungsten is removed from contact holes during the manufacturing process, then the contact holes are cleared of多余 conductor material, but the oxide layer on the periphery becomes higher than the tungsten, resulting in larger height difference between metal via structures

Engineering Contradiction:
Improveexcess tungsten removalVSAvoidheight difference uniformity
Core Design Contradiction:
Loss of substanceVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing a first etching process before the second etching process to remove the oxide layer on the periphery of the contact holes. This preliminary removal of the oxide layer prevents the height difference problem that would otherwise occur after excess tungsten removal, as the oxide layer is already gone before the tungsten is etched away.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the etching process into two distinct stages: a first etching process that targets and removes the oxide layer on the periphery, and a second etching process that removes excess tungsten from the contact holes. This segmentation allows each process to be optimized for its specific target, preventing the height difference issue while maintaining effective excess material removal.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a single etching process is used to remove excess conductor material, then the process is simple and fast, but the height difference between metal via structures increases due to oxide layer interference

Engineering Contradiction:
Improvemanufacturing process efficiencyVSAvoidheight difference control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent divides the etching operation into two separate processes: a first etching process that selectively removes the oxide layer on the periphery, and a second etching process that removes excess tungsten from the contact holes. This segmentation enables each process to be optimized for its specific function, achieving both high productivity and precise height difference control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by making the first etching process target specifically the oxide layer on the periphery with different etching parameters than the second process that targets the tungsten in the contact holes. This localized approach ensures that each material is removed with optimal etching conditions, maintaining both efficiency and precision.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the uniformity of resistance distribution in the metal interconnect layer and ensures reliable electrical connections between layers, thereby enhancing the manufacturing process efficiency.

Implementation Method 1

a method is employed to ensure that the top surfaces of metal via structures in the substrate are flush with the substrate surface through a combination of wet and dry etching processes

Methodology Applied
Scientific EffectWet etching:

Implementation Method 2

a method is employed to ensure that the top surfaces of metal via structures in the substrate are flush with the substrate surface through a combination of wet and dry etching processes

Methodology Applied
Scientific EffectDry etching:

Data Source

PatentUS12500163B2Semiconductor structure and manufacturing method thereof
Publication Date: 2025.12.16 CHANGXIN MEMORY TECH INC
  • US12500163B2 patent drawing
  • US12500163B2 patent drawing
  • US12500163B2 patent drawing

AI summary

The present disclosure provides a semiconductor structure and a manufacturing method thereof. The manufacturing method includes: providing a substrate; and forming a first metal via structure, where the first metal via structure is provided in the substrate, and a top surface of the first metal via structure is flush with a top surface of the substrate, where the top surface of the first metal via structure is made flush with the top surface of the substrate through at least a first process and a second process.